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MC34703 View Datasheet(PDF) - Freescale Semiconductor

Part Name
Description
Manufacturer
MC34703
Freescale
Freescale Semiconductor Freescale
MC34703 Datasheet PDF : 46 Pages
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ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics (continued)
Characteristics noted under conditions -40°C TJ 85°C unless otherwise noted. Input voltages 2.8 V VIN 13.5 V. Typical
values noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
LINEAR REGULATOR (LDO, ISNS, LDRV, LFB) (17)
LDO Output Voltage Range (17)
VIN1 = VIN2 = 2.8 V to 13.5 V, ILDO = 100 mA to 2000 mA
LDO Feedback Voltage, LFB Pin Connected to LDO Pin
VIN1 = VIN2 = 2.8 V to 13.5 V, ILDO = 100 mA to 2000 mA. Includes
Load Regulation Error
VLDO
VLDO
V
0.8
4.5
V
0.784
0.8
0.816
LDO Voltage Margining Step Size
VMLDO
1.0
%
LDO Line Regulation
VIN1 = VIN2 = 2.8 V to 13.5 V, ILDO = 1000 mA
REGLNVLDO
%
-1.0
1.0
LDO Load Regulation
ILDO = 100 mA to 2000 mA
REGLDVLDO
%
-1.0
1.0
LDO Ripple Rejection, Dropout Voltage VDO = 1.0 V,
VRIPPLE = +1.0 V p-p (18)
Sinusoidal, f = 300 kHz, ILDO = 500 mA
LDO Maximum Dropout Voltage (VIN - VLDO) (18)
VLDO = 2.5 V, ILDO = 2000 mA
VLDORR
dB
26
VDO
mV
50
LDO Current Sense Comparator Threshold Voltage (VCS - VLDO)
VCSTH
35
45
65
mV
LDO Pin Input Current
ILDO
1.0
2.0
4.0
mA
LDO Feedback Input Current (LFB Pin)
ILFB
-1.0
0.04
1.0
µA
LDO Drive Output Current (LDRV Pin)
LDO Drive Current Limit (LDRV Pin) (18)
ILDRV
IDRLIM
2.0
4.0
5.0
mA
3.6
mA
ISNS Pin Input Leakage Current
VISNS = 5.0 V
LDO Error Amplifier Input Impedance (LFB Pin) (18)
LDO Error Amplifier Output Impedance (LCMP Pin) (18)
ISNSLK
RIN
ROUT
µA
50
125.0
200
10
ΜΩ
60
LDO Internal Pull-Down MOSFET Current Limit
TA = 25°C, VBST = 8.0 V (LDO Pin)
IQ4LIM
A
0.75
1.7
2.0
LDO Internal Pull-Down MOSFET RDS(ON)
ID = 1.0 A, TA = 25°C, VBST = 8.0 V
Q4RDS(ON)
3.2
LDO Recommended Output Capacitance
CLDO
10
µF
LDO Recommended Output Capacitor ESR
ESRCLDO
100
m
Thermal Shutdown (LDO Pull-Down FET Q4) (19)
TSD
150
170
190
°C
Thermal Shutdown Hysteresis (19)
TSDHYS
15
°C
Soft Start Duration (Power Sequencing Disabled, EN1 = 1, EN2 = 1) (18)
tSS
800
µs
Notes
17. The LDO output range is given for the MOSFET as depicted on Figure 33. Should the customer select another MOSFET, It is the
customer’s responsibility to properly select the MOSFET given the expected power dissipation, voltage drop across it and any other
constraint that could impact the MOSFET reliability and range of work.
18. Not production tested for typical values specified.
19. Guaranteed by design.
Analog Integrated Circuit Device Data
Freescale Semiconductor
34703
9

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