56F8147 View Datasheet(PDF) - Freescale Semiconductor
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Description
Manufacturer
56F8147 Datasheet PDF : 172 Pages
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Version History
Rev 0
Rev 1.0
Rev 2.0
Rev 3.0
Rev 4.0
Rev 5.0
Rev 6.0
Rev 7.0
Rev 8.0
Rev 9.0
Rev 10.0
Rev. 11
Document Revision History
Description of Change
Initial release
Fixed typos in Section 1.1.3, Replace any reference to Flash Interface Unit with Flash Module,
corrected pin number for D14 in Table 2-2, added note to Vcap pin in Table 2-2, corrected
thermal numbers for 160 LQFP in Table 10-4,removed unneccessary notes in Table 10-13;
corrected temperature range in Table 10-14; added ADC calibration information to Table 10-24
and new graphs in Figure 10-22.
Clarification to Table 10-23, corrected Digital Input Current Low (pull-up enabled)
numbers in Table 10-5. Removed text and Table 10-2; replaced with note to Table 10-1.
Added 56F8147 information; edited to indicate differences in 56F8347 and 56F8147.
Reformatted for Freescale look and feel. Updated Temperature Sensor and ADC tables, then
updaated balance of electrical tables for consistency throughout the family. Clarified I/O power
description in Table 2-2, added note to Table 10-7 and clarified Section 12.3.
Correcting Figure 4-1 Boot Flash Start = $02_0000
Added output voltage maximum value and note to clarify in Table 10-1; also removed overall life
expectancy note, since life expectancy is dependent on customer usage and must be
determined by reliability engineering. Clarified value and unit measure for Maximum allowed PD
in Table 10-3. Corrected note about average value for Flash Data Retention in Table 10-4.
Added new RoHS-compliant orderable part numbers in Table 13-1.
Added 160MAPBGA information, TA equation updated in Table 10-4 and additional minor edits
throughout data sheet
Updated Table 10-24 to reflect new value for maximum Uncalibrated Gain Error
Deleted formula for Max Ambient Operating Temperature (Automotive) and Max Ambient
Operating Temperature (Industrial) and corrected Flash Endurance to 10,000 in Table 10-4.
Added RoHS-compliance and “pb-free” language to back cover.
Corrected Section 6.4 title (from Operation Mode Register to Operating Mode Register).
Updated JTAG ID in Section 6.5.4. Added information/corrected state during reset in Table 2-2.
Clarified external reference crystal frequency for PLL in Table 10-14 by increasing maximum
value to 8.4MHz.
Replaced “Tri-stated” with an explanation in State During Reset column in Table 2-2.
• Added the following note to the description of the TMS signal in Table 2-2:
Note: Always tie the TMS pin to VDD through a 2.2K resistor.
• Added the following note to the description of the TRST signal in Table 2-2:
Note: For normal operation, connect TRST directly to VSS. If the design is to be used in a debugging
environment, TRST may be tied to VSS through a 1K resistor.
Please see http://www.freescale.com for the most current data sheet revision.
56F8347 Technical Data, Rev.11
2
Freescale Semiconductor
Preliminary
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