MCF5251(2007) View Datasheet(PDF) - Freescale Semiconductor
Part Name
Description
Manufacturer
MCF5251 Datasheet PDF : 32 Pages
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Functional Description
2 Functional Description
2.1 Version 2 ColdFire Core
The Version 2 ColdFire (CF2) core consists of two independent, decoupled pipeline structures to maximize
performance while minimizing core size. The instruction fetch pipeline (IFP) is a two-stage pipeline for
prefetching instructions. The prefetched instruction stream is then gated into the two-stage operand
execution pipeline (OEP), which decodes the instruction, fetches the required operands, and then executes
the required function.
2.2 Module Inventory
Table 2 shows an alphabetical listing of the modules in the processor.
Table 2. Digital and Analog Modules
Block
Mnemonic
Block Name
Functional
Grouping
Brief Description
ATA
ADC
AB
AIM
BROM
FlexCAN
CSM
DMAC
eMAC
MBUS
MMC/SD
Advanced Technology Connectivity The ATA block is an AT attachment host interface. Its main use is to
Attachment Controller Peripheral
interface with IDE hard disc drives and ATAPI optical disc drives.
Battery Level/Keypad Analog Input
Analog/Digital
Converter
The six-channel ADC is based on the Sigma-Delta concept with 12-bit
resolution. Both the analog comparator and digital sections are integrated
in the MCF5251.
Audio Bus
Audio
Interface
The audio interfaces connect to an internal bus that carries all audio data.
Each receiver places its received data on the audio bus and each
transmitter takes data from the audio bus for transmission.
Audio Interface
Audio
Interface
The audio interface module provides the necessary input and output
features to receive and transmit digital audio signals over serial audio
interfaces (IIS/EIAJ) and over digital audio interfaces (IEC958).
Bootloader
Boot ROM
The MCF5251 incorporates a ROM Bootloader, which enables booting
from UART, I2C, SPI, or IDE devices.
Twin Controller Area
Network 2.0B
Communication Unit
Connectivity
Peripheral
The FlexCan module is a full implementation of the Bosch CAN protocol
specification 2.0B, which supports both standard and extended message
frames.
Chip Select Module
Connectivity
Peripheral
Three programmable chip-select outputs (CS0/CS4, CS1, and CS2)
provide signals that enable glueless connection to external memory and
peripheral circuits.
Direct Memory
Access Controller
Module
Connectivity There are four fully programmable DMA channels for quick data transfer.
Peripheral
enhanced Multiply Core
Accumulate Module
The integrated eMAC unit provides a common set of DSP operations and
enhances the integer multiply instructions in the ColdFire architecture.
Memory Bus Interface Bus Operation The bus interface controller transfers data between the ColdFire core or
DMA and memory, peripherals, or other devices on the external bus.
Multimedia
Card/Secure Digital
Interface
Flash Memory The interface is Sony® Memory Stick®, SecureDigital, and Multi-Media
Card Interface card compatible.
Note: The Sony Memory Interface does not support Sony MagicGateâ„¢.
MCF5253 ColdFire Processor Data Sheet: Technical Data, Rev. 2.2
4
Freescale Semiconductor
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