Signal Descriptions
Table 2. MCF5270 and MCF5271 Signal Information and Muxing (continued)
Signal Name
GPIO
Alternate 1 Alternate 2 Dir.1
SD_WE PSDRAM5
SD_SCAS PSDRAM4
SD_SRAS PSDRAM3
SD_CKE PSDRAM2
SD_CS[1:0] PSDRAM[1:0]
IRQ[7:3]
PIRQ[7:3]
—
—
O
—
—
O
—
—
O
—
—
O
—
—
O
External Interrupts Port
—
—
I
IRQ2
IRQ1
PIRQ2
DREQ2
—
I
PIRQ1
—
—
I
FEC
EMDC
EMDIO
ECOL
ECRS
ERXCLK
ERXDV
ERXD[3:0]
ERXER
ETXCLK
ETXEN
ETXER
ETXD[3:0]
PFECI2C3
PFECI2C2
—
—
—
—
—
—
—
—
—
—
I2C_SCL
I2C_SDA
—
—
—
—
—
—
—
—
—
—
U2TXD O
U2RXD I/O
—
I
—
I
—
I
—
I
—
I
—
O
—
I
—
I
—
O
—
O
I2C
I2C_SDA PFECI2C1
—
I2C_SCL PFECI2C0
—
—
I/O
—
I/O
DMA
DACK[2:0] and DREQ[2:0] do not have a dedicated bond
pads. Please refer to the following pins for muxing:
TS and DT2OUT for DACK2, TSIZ1and DT1OUT for DACK1,
TSIZ0 and DT0OUT for DACK0, IRQ2 and DT2IN for DREQ2,
TEA and DT1IN for DREQ1, and TIP and DT0IN for DREQ0.
QSPI
QSPI_CS1 PQSPI4 SD_CKE
—
O
MCF5270
MCF5271
160 QFP
92
91
90
139
—
IRQ7=63
IRQ4=64
—
65
151
150
9
8
7
6
5:2
159
158
157
156
155:152
—
—
—
—
MCF5270
MCF5271
196 MAPBGA
K13
K12
K11
E8
L12, L13
N7, M7, L7, P8,
N8
M8
L8
D4
D5
E2
E1
D1
D2
D3, C1, C2, B1
B2
A2
C3
B3
A3, A4, C4, B4
J12
J11
—
B7
MCF5271 Integrated Microprocessor Hardware Specification, Rev. 1.2
14
Freescale Semiconductor