MCIMX35 View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

MCIMX35

i.MX35 Applications Processors for Automotive Products

Freescale Semiconductor 

Table 4. Digital and Analog Modules (continued)

Block

Mnemonic

Block Name

Domain1

Subsystem

Brief Description

ATA ATA module SDMA

Connectivity

peripherals

The ATA block is an AT attachment host interface. Its main use is to

interface with IDE hard disk drives and ATAPI optical disk drives. It

interfaces with the ATA device over a number of ATA signals.

AUDMUX Digital audio ARM

mux

CAN(2) CAN module ARM

CCM

Clock control ARM

module

CSPI(2)

Configurable

serial

peripheral

interface

SDMA,

ARM

ECT

Embedded SDMA,

cross trigger ARM

EMI External

memory

interface

SDMA

EPIT(2)

Enhanced

ARM

periodic

interrupt timer

Multimedia

peripherals

Connectivity

peripherals

Clocks

Connectivity

peripherals

Debug

External

memory

interface

Timer

peripherals

The AUDMUX is a programmable interconnect for voice, audio, and

synchronous data routing between host serial interfaces (SSIs) and

peripheral serial interfaces (audio codecs). The AUDMUX has two

sets of interfaces: internal ports to on-chip peripherals and external

ports to off-chip audio devices. Data is routed by configuring the

appropriate internal and external ports.

The CAN protocol is primarily designed to be used as a vehicle

serial data bus running at 1 Mbps.

This block generates all clocks for the peripherals in the SDMA

platform. The CCM also manages ARM1136 platform low-power

modes (WAIT, STOP), disabling peripheral clocks appropriately for

power conservation, and provides alternate clock sources for the

ARM1136 and SDMA platforms.

This module is a serial interface equipped with data FIFOs; each

master/slave-configurable SPI module is capable of interfacing to

both serial port interface master and slave devices. The CSPI ready

(SPI_RDY) and slave select (SS) control signals enable fast data

communication with fewer software interrupts.

ECT (embedded cross trigger) is an IP for real-time debug

purposes. It is a programmable matrix allowing several subsystems

to interact with each other. ECT receives signals required for

debugging purposes (from cores, peripherals, buses, external

inputs, and so on) and propagates them (propagation programmed

through software) to the different debug resources available within

the SoC.

The EMI module provides access to external memory for the ARM

and other masters. It is composed of the following main

submodules:

M3IF—provides arbitration between multiple masters requesting

access to the external memory.

SDRAM CTRL—interfaces to mDDR, DDR2 (4-bank architecture

type), and SDR interfaces.

NANDFC—provides an interface to NAND Flash memories.

WEIM—interfaces to NOR Flash and PSRAM.

Each EPIT is a 32-bit “set-and-forget” timer that starts counting after

the EPIT is enabled by software. It is capable of providing precise

interrupts at regular intervals with minimal processor intervention. It

has a 12-bit prescaler to adjust the input clock frequency to the

required time setting for the interrupts, and the counter value can be

programmed on the fly.

i.MX35 Applications Processors for Automotive Products, Rev. 8

8

Freescale Semiconductor

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