MCM67D709FN20 View Datasheet(PDF) - Motorola => Freescale
Part Name
Description
Manufacturer
MCM67D709FN20 Datasheet PDF : 12 Pages
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WRITE THROUGH – READ – WRITE (See Note 1)
Processor Frequency
60 MHz
MCM67D709–16
50 MHz
MCM67D709–20
Parameter
Symbol
Min
Max
Min
Max Unit Notes
Write Cycle Times
tKHKH
16
—
20
—
ns 1, 2
Clock Low Pulse Width
tKLKH
5
—
5
—
ns
Clock High Pulse Width
tKHKL
7
—
7
—
ns
Clock High to Output High–Z (W = VIL and
SIE = PIE = VIH)
tKHQZ
—
8
—
8
ns 3, 4
Setup Times:
A
tAVKL
2
—
2
—
ns
W tWLKH
2
2
PIE tPIEVKH
2
2
SIE tSIEVKH
2
2
SDQ0 – SDQ7, SDQP, PDQ0 – PDQ7, PDQP tDVKH
2
2
Hold Times:
A
tKLAX
2
—
2
—
ns
W tKHWX
2
2
PIE tKHPIEX
2
2
SIE tKHSIEX
2
2
SDQ0 – SDQ7, SDQP, PDQ0 – PDQ7, PDQP tKHDX
2
2
Write with Streaming (PIE = SOE = VIL or
SIE = POE = VIL) Clock High to Output Valid
tKHQV
—
5
—
7
ns
5
Output Enable High to Q High–Z
tPOEHQZ
0
6
0
8
ns
6
tSOEHQZ
Output Hold from Output Enable High
tPOEHQX
2
—
5
—
ns
6
tSOEHQX
Output Enable Low to Q Active
tPOELQX
0
—
0
—
ns
6
tSOELQX
Output Enable Low to Output Valid
tPOELQV
—
5
—
6
ns
tSOELQV
NOTES:
1. A write is performed with W = VIL for the specified setup and hold times and either PIE = VIL or SIE = VIL. If both PIE = VIL and SIE = VIL or
PIE = VIH and SIE = VIH, then this is treated like a NOP and no write is performed.
2. All write cycle timings are referenced from K.
3. K must be at a high level for the outputs to transition.
4. Transition is measured ± 500 mV from steady–state voltage with output load of Figure 1B. This parameter is sampled and not 100% tested.
5. A write with streaming is defined as a write cycle which writes data from one data bus to the array and outputs the same data onto the
other data bus.
6. Transition is measured ± 500 mV from steady–state voltage with output load of Figure 1B. This parameter is sampled and not 100% tested.
At any given voltage and temperature, tPOEHQZ is less than tPOELQX for a given device, and tSOEHQZ is less than tSOELQX for
a given device.
MCM67D709
6
MOTOROLA FAST SRAM
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