MCP3002 View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

MCP3002

2.7V Dual Channel 10-Bit A/D Converter with SPI Serial Interface

Microchip Technology 

MCP3002

ELECTRICAL CHARACTERISTICS (CONTINUED)

All parameters apply at VDD = 5V, TA = -40°C to +85°C, fSAMPLE = 200 ksps and fCLK = 16*fSAMPLE, unless otherwise noted.

Typical values apply for VDD = 5V, TA = +25°C, unless otherwise noted.

PARAMETER

SYM

MIN

TYP

MAX

UNITS

CONDITIONS

Digital Input/Output:

Data Coding Format

Straight Binary

High Level Input Voltage

VIH

0.7 VDD

—

—

V

Low Level Input Voltage

VIL

—

—

0.3 VDD

V

High Level Output Voltage

VOH

4.1

—

—

V

IOH = -1 mA, VDD = 4.5V

Low Level Output Voltage

VOL

—

—

0.4

V

IOL = 1 mA, VDD = 4.5V

Input Leakage Current

ILI

-10

—

10

µA

VIN = VSS or VDD

Output Leakage Current

ILO

-10

—

10

µA

VOUT = VSS or VDD

Pin Capacitance

(All Inputs/Outputs)

Timing Parameters:

CIN, COUT

—

—

10

pF

VDD = 5.0V (Note 1)

TA = 25°C, f = 1 MHz

Clock Frequency

Clock High Time

fCLK

—

—

3.2

MHz VDD = 5V (Note 2)

—

—

1.2

MHz VDD = 2.7V (Note 2)

tHI

140

—

—

ns

Clock Low Time

tLO

140

—

—

ns

CS Fall To First Rising CLK Edge

tSUCS

100

—

—

ns

Data Input Setup Time

tSU

50

—

—

ns

Data Input Hold Time

tHD

50

—

—

ns

CLK Fall To Output Data Valid

CLK Fall To Output Enable

CS Rise To Output Disable

tDO

tEN

tDIS

—

—

125

—

—

200

—

—

125

200

—

—

100

ns

VDD = 5V, see Figure 1-2

ns

VDD = 2.7V, see Figure 1-2

ns

VDD = 5V, see Figure 1-2

ns

VDD = 2.7V, see Figure 1-2

ns See Test Circuits, Figure 1-2

Note 1

CS Disable Time

tCSH

310

—

—

ns

DOUT Rise Time

tR

—

—

100

ns See Test Circuits, Figure 1-2

Note 1

DOUT Fall Time

tF

—

—

100

ns See Test Circuits, Figure 1-2

Note 1

Power Requirements:

Operating Voltage

VDD

2.7

—

5.5

V

Operating Current

Standby Current

IDD

IDDS

—

525

650

—

300

—

—

0.005

2

µA

VDD = 5.0V, DOUT unloaded

VDD = 2.7V, DOUT unloaded

µA

CS = VDD = 5.0V

Note 1: This parameter is established by characterization and not 100% tested.

2: The sample cap will eventually lose charge, especially at elevated temperatures, therefore fCLK ≥10 kHz for temperatures

at or above 70°C.

DS21294D-page 4

© 2008 Microchip Technology Inc.

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