MDT2051
Instruction Code
Mnemonic
Operands
Function
Operating
010110 trrrrrrr
010101 trrrrrrr
010000 1xxxxxxx
RRR R, t
Rotate right register
RLR R, t
Rotate left register
CLRW
Clear working register
R(n) →R(n-1),
C→R(7), R(0)→C
R(n)→r(n+1),
C→R(0), R(7)→C
0→W
010001 0rrrrrrr
CLRR R
Clear register
0→R
0000bb brrrrrrr
BCR R, b Bit clear
0→R(b)
0010bb brrrrrrr
BSR R, b Bit set
1→R(b)
0001bb brrrrrrr
BTSC R, b Bit Test, skip if clear
Skip if R(b)=0
0011bb brrrrrrr
BTSS R, b Bit Test, skip if set
Skip if R(b)=1
100nnn nnnnnnnn
101nnn nnnnnnnn
LCALL n
LJUMP n
Long CALL subroutine
Long JUMP to address
n→PC,
PC+1→Stack
n→PC
110111 iiiiiiii
ADDWI i
Add immediate to W
W+i→W
110001 iiiiiiii
RTIW i
Return, place immediate to W
Stack→PC,i→W
111000 iiiiiiii
SUBWI i
Subtract W from immediate
i-W→W
010000 00001001
Note :
W
:
WT
:
TMODE :
CPIO
:
TF
:
PF
:
PC
:
OSC
:
Inclu.
:
Exclu.
:
AND
:
RTFI
Reture from interrupt
Working register
Watchdog timer
TMODE mode register
Control I/O port register
Timer overflow flag
Power loss flag
Program Counter
Oscillator
Inclusive ‘∪’
Exclusive ‘⊕’
Logic AND ‘∩’
b:
t:
0
1
R:
C:
HC :
Z:
/:
x:
i:
n:
Stack→PC,1→GIS
Bit position
Target
: Working register
: General register
General register address
Carry flag
Half carry
Zero flag
Complement
Don’t care
Immediate data ( 8 bits )
Immediate address
Status
C
C
Z
Z
None
None
None
None
None
None
C,HC,Z
None
C,HC,Z
None
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http;//www.mdtic.com.tw
P. 9
2004/1 Ver. 1.8