MK2745-24 View Datasheet(PDF) - Integrated Circuit Systems
Part Name
Description
Manufacturer
MK2745-24 Datasheet PDF : 4 Pages
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I CR O C LOC K
MK2745-24
DVD/MPEG Clock Source
Electrical Specifications
Parameter
Conditions
ABSOLUTE MAXIMUM RATINGS (note 1)
Supply voltage, VDD
Referenced to GND
Inputs and Clock Outputs
Referenced to GND
Ambient Operating Temperature
Soldering Temperature
Max of 20 seconds
Storage temperature
DC CHARACTERISTICS (VDD = 5.0V unless noted)
Operating Voltage, VDD
Input High Voltage, VIH, X1/ICLK pin only
Input Low Voltage, VIL, X1/ICLK pin only
Input High Voltage, VIH
Input Low Voltage, VIL
Output High Voltage, VOH
IOH=-25mA
Output Low Voltage, VOL
IOL=25mA
Output High Voltage, VOH, CMOS level
IOH=-8mA
Operating Supply Current, IDD
No Load, note 2
Short Circuit Current
Each output
Input Capacitance
AC CHARACTERISTICS (VDD = 5.0V unless noted)
Input Frequency
Output Clock Rise Time
0.8 to 2.0V
Output Clock Fall Time
2.0 to 0.8V
Output Clock Duty Cycle
At VDD/2
Frequency synthesis error, all clocks
Absolute Jitter, short term
Variation from mean
Minimum Typical Maximum Units
7
V
-0.5
VDD+0.5 V
0
70
°C
260
°C
-65
150
°C
3
5.5
V
VDD/2 + 1 VDD/2
V
VDD/2 VDD/2 - 1 V
2
V
0.8
V
2.4
V
0.4
V
VDD-0.4
V
37
mA
±100
mA
7
pF
27.000
MHz
1.5
ns
1.5
ns
40
60
%
0
1
ppm
200
ps
Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
2. With VDD=3.3V, processor clock at 60MHz, and ACLK at 12.288MHz.
External Components
The MK2745-24 requires a minimum number of external components for proper operation. Decoupling
capacitors of 0.1µF should be connected between VDD and GND (on pins 4 and 5, and pins 13 and 12),
as close to the MK2745-24 as possible. A series termination resistor of 33Ω may be used for each clock
output. If a clock input is not used, the 27.00 MHz crystal must be connected as close to the chip as
possible. The crystal should be a fundamental mode (do not use third overtone), parallel resonant, 50ppm
or better. Crystal capacitors should be connected from pins X1 to ground and X2 to ground. The value of
these capacitors is given by the following equation, where CL is the crystal load capacitance: Crystal caps
(pF) = (CL-6) x 2. So for a crystal with 16pF load capacitance, two 20pF caps should be used.
MDS 2745-24 B
3
Revision 100898
Printed 11/16/00
MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
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