ML6652 View Datasheet(PDF) - Micro Linear Corporation
Part Name
Description
Manufacturer
ML6652
Micro Linear Corporation
ML6652 Datasheet PDF : 28 Pages
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PIN CONFIGURATION
ML6652
PIN DESCRIPTIONS
Signal names followed by "#" indicate active low input.
Pin No. Signal Name
I/O
Description
CONFIGURATION
4
AD4LIW
5
AD32
I
Sets the value of the Physical Layer (PHY) address bit 4 for accessing the Serial
Management Interface, and determines if the Link Integrity Warning (LIW)
function is enabled or disabled.
The Link Integrity Warning (LIW) function can only be enabled when only one
SPEED is available through setting of SPEED ( pin 27) and/or management
registers. When LIW is enabled and the input link is down at one interface to
the Media Converter, the transmitter output on that interface is turned off for
about 425ms every 3.8 seconds. It applies to both network interfaces and both
data rates. If the link at the other interface to the Media Converter is also
down, there is no output. The LIW function causes the Link Up indicator of the
link partner to blink.
Note: this pin is typically read a few microseconds after power-up, if it is tied
to supplies that do not track the ML6652 power improper results will occur.
Use VCCD (pin 19) as the pull up point, do not add decoupling capacitors to
this input pin (without thoroughly understanding your PCB layout dynamics the
safest course is to make short connections and do not add decoupling
capacitors to this input pin).
I
Sets the value of the PHY address bits 3 and 2 for accessing the Serial
Management Interface.
Note: this pin is typically read a few microseconds after power-up, if it is tied
to supplies that do not track the ML6652 power improper results will occur.
Use VCCD (pin 19) as the pull up point, do not add decoupling capacitors to
this input pin (without thoroughly understanding your PCB layout dynamics the
safest course is to make short connections and do not add decoupling
capacitors to this input pin).
4
January 2004
Final Datasheet
DS6652-F-02
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