MPC8540(2004) View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

MPC8540
(Rev.:2004)

PowerQUICC III™ Integrated Host Processor Reference Manual

Freescale Semiconductor 

Contents

Paragraph

Number

Title

Page

Number

1.3.14.1

1.3.15

1.3.16

1.3.17

1.3.18

1.3.19

1.3.20

1.4

1.4.1

RapidIO Message Unit .......................................................................................... 1-19

Power Management ................................................................................................... 1-19

Clocking..................................................................................................................... 1-20

Address Map .............................................................................................................. 1-20

OCeaN Switch Fabric ................................................................................................ 1-20

Processing Across the On-Chip Fabric...................................................................... 1-20

Data Processing with the e500 Coherency Module ................................................... 1-21

MPC8540 Application Examples .................................................................................. 1-21

MPC8540 Applications.............................................................................................. 1-21

2.1

2.2

2.2.1

2.2.2

2.2.3

2.2.3.1

2.2.3.2

2.2.3.3

2.2.3.4

2.2.3.5

2.2.3.6

2.2.3.7

2.2.4

2.2.5

2.2.5.1

2.2.5.2

2.2.5.3

2.3

2.3.1

2.3.2

2.3.3

2.3.4

2.3.5

Chapter 2

Memory Map

Local Memory Map Overview and Example .................................................................. 2-1

Address Translation and Mapping ................................................................................... 2-3

SRAM Windows.......................................................................................................... 2-4

Window into Configuration Space............................................................................... 2-4

Local Access Windows................................................................................................ 2-4

Local Access Register Memory Map ...................................................................... 2-5

Local Access Window n Base Address Registers

(LAWBAR0–LAWBAR7)................................................................................... 2-6

Local Access Window n Attributes Registers

(LAWAR0–LAWAR7)......................................................................................... 2-6

Precedence of Local Access Windows .................................................................... 2-7

Configuring Local Access Windows ....................................................................... 2-7

Distinguishing Local Access Windows from Other Mapping Functions ................ 2-8

Illegal Interaction Between Local Access Windows and DDR

SDRAM Chip Selects.......................................................................................... 2-8

Outbound Address Translation and Mapping Windows.............................................. 2-8

Inbound Address Translation and Mapping Windows ................................................ 2-9

RapidIO Inbound ATMU......................................................................................... 2-9

PCI/PCI-X Inbound ATMU..................................................................................... 2-9

Illegal Interaction Between Inbound ATMUs and Local Access

Windows .............................................................................................................. 2-9

Configuration, Control, and Status Register Map.......................................................... 2-10

Accessing CCSR Memory from External Masters .................................................... 2-11

Organization of CCSR Memory ................................................................................ 2-11

General Utilities Registers ......................................................................................... 2-13

Interrupt Controller and CCSR .................................................................................. 2-14

RapidIO and CCSR.................................................................................................... 2-15

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

vi

Freescale Semiconductor

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