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MPC8544E(2009) View Datasheet(PDF) - Freescale Semiconductor

Part Name
Description
Manufacturer
MPC8544E
(Rev.:2009)
Freescale
Freescale Semiconductor Freescale
MPC8544E Datasheet PDF : 120 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Freescale Semiconductor
Technical Data
Document Number: MPC8544EEC
Rev. 3, 11/2009
MPC8544E PowerQUICC™ III
Integrated Processor
Hardware Specifications
1 MPC8544E Overview
This section provides a high-level overview of MPC8544E
features. Figure 1 shows the major functional units within
the device.
1.1 Key Features
The following list provides an overview of the device feature
set:
• High-performance 32-bit Book E–enhanced core
built on Power Architecture™ technology:
— 32-Kbyte L1 instruction cache and 32-Kbyte L1
data cache with parity protection. Caches can be
locked entirely or on a per-line basis, with
separate locking for instructions and data.
— Signal-processing engine (SPE) APU (auxiliary
processing unit). Provides an extensive
instruction set for vector (64-bit) integer and
fractional operations. These instructions use both
the upper and lower words of the 64-bit GPRs as
they are defined by the SPE APU.
Contents
1. MPC8544E Overview . . . . . . . . . . . . . . . . . . . . . . . . . 1
2. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . 8
3. Power Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 13
4. Input Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5. RESET Initialization . . . . . . . . . . . . . . . . . . . . . . . . . 16
6. DDR and DDR2 SDRAM . . . . . . . . . . . . . . . . . . . . . 17
7. DUART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
8. Enhanced Three-Speed Ethernet (eTSEC),
MII Management . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
9. Ethernet Management Interface Electrical
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
10. Local Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
11. Programmable Interrupt Controller . . . . . . . . . . . . . 56
12. JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
13. I2C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
14. GPIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
15. PCI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
16. High-Speed Serial Interfaces (HSSI) . . . . . . . . . . . . 65
17. PCI Express . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
18. Package Description . . . . . . . . . . . . . . . . . . . . . . . . . 83
19. Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
20. Thermal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
21. System Design Information . . . . . . . . . . . . . . . . . . 107
22. Device Nomenclature . . . . . . . . . . . . . . . . . . . . . . . 116
23. Document Revision History . . . . . . . . . . . . . . . . . . 119
© Freescale Semiconductor, Inc., 2008, 2009. All rights reserved.

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