MR16R0826BN1-CK8 View Datasheet(PDF) - Samsung
Part Name
Description
Manufacturer
MR16R0826BN1-CK8 Datasheet PDF : 4 Pages
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SERIAL PRESENCE DETECT
MR16R0824(6/8/C/G)BN1
RAMBUS MODULE
MR16R0824(6/8)BN1-CK8/CK7/CG6
• Feature : Single Sided Module & 1,250 mil height
• Composition : 8Mx16 *4(6/8)pcs
• Used component type & part number
1 Normal Package (K4R271669B-NCK8/NCK7/NCG6)
• # of banks in component : 32s banks (Doubled with Split Banks)
• Refresh : 16K/32ms
MR16R082C(G)BN1-CK8/CK7/CG6
• Feature : Double Sided Module & 1,250 mil height
• Composition : 8Mx16 *12(16)pcs
• Used component type & part number
1 Normal Package (K4R271669B-NCK8/NCK7/NCG6)
2 Mirrored Package (K4R271669B-MCK8/MCK7/MCG6)
• # of banks in component :32s banks (Doubled with Split Banks)
• Refresh : 16K/32ms
• Contents ;
Byte #
(Dec)
Described Function
Option
Field
Width
0 SPD Revision Level
8
1 Total Number of Bytes in the SPD
8
2 Device Type
8
3 Module Type
8
4 Row Address Bits[3:0], Column Address Bits[3:0]
4,4
5 Bank Address Bits and Type
8
6 Refresh Bank Bits
3
7
Refresh Period(=tREF)
8
8 Protocol Version
8
9 Misc. Device Configuration Field
8
10 Minimum Precharge to RAS time(=tRP-R,Min )
5
11 Minimum RAS to Precharge time(=tRAS-R,Min)
6
12 Minimum RAS to CAS time(=tRCD-R,Min)
5
13 Minimum RAS to RAS time(=tRR-R,Min)
5
14 Minimum Precharge to Precharge time(=tPP-R,Min)
5
15 Min tCYCLE for Range A
8
16 Max tCYCLE for Range A
8
17 tCDLY Range for Range A
8
Units
LUT
LUT
LUT
LUT
bits
LUT
bits
ms
LUT
n/a
1/fRAS
1/fRAS
1/fRAS
1/fRAS
1/fRAS
128ps
128ps
tCYCLE
Supported Function
K8
K7
G6
SPD Revision 1.0
256 Bytes
Direct RDRAM
RIMM Module
9 bits, 6 bits
32s banks
32 Refresh Bank Sets
32ms
Protocol Version 1
DQS=1.5, no -LP, S28, S3
8cycles 8cycles 8cycles
20cycles 20cycles 20cycles
10cycles 8cycles 8cycles
8cycles 8cycles 8cycles
8cycles 8cycles 8cycles
2.50ns 2.80ns 3.33ns
3.83ns 3.83ns 3.83ns
5tCYCLE 5tCYCLE 5tCYCLE
~ 9tCYCLE ~ 9tCYCLE ~ 9tCYCLE
18 tCLS and tCAS Range for Range A
19 Min tCYCLE for Range B
20 Max tCYCLE for Range B
21 tCDLY Range for Range B
22 tCLS and tCAS Range for Range B
23 Min tCYCLE for Range C
24 Max tCYCLE for Range C
25 tCDLY Range for Range C
26 tCLS and tCAS Range for Range C
27 Min tCYCLE for Range D
28 Max tCYCLE for Range D
29 tCDLY Range for Range D
30 tCLS and tCAS Range for Range D
31 Power Down Exit Max.time, Phase A(=tPDNXA,Max)
32 Power Down Exit Max.time, Phase B(=tPDNXB,Max)
33 Nap Exit Max.time, Phase A(=tNAPXA,Max)
34 Nap Exit Max.time, Phase B(=tNAPXB,Max)
35
fIMIN[11:8]
fIMAX[11:8]
8
tCYCLE
8
128ps
2tCYCLE for tCLS & tCAS
RFU
8
128ps
8
tCYCLE
8
tCYCLE
8
128ps
8
128ps
8
tCYCLE
8
tCYCLE
8
128ps
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
8
128ps
RFU
8
tCYCLE
8
tCYCLE
8
us
RFU
RFU
4us
8 64tCYCLE
8
ns
9000tCYCLE
50ns
8
ns
40ns
4
4
MHz
261MHz 261MHz 261MHz
400MHz 357MHz 300MHz
36 fIMIN[7:0]
37 fIMAX[7:0]
38 ODF mapping
8
MHz 261MHz 261MHz 261MHz
8
MHz 400MHz 357MHz 300MHz
-
-
-
Hex Value
K8 K7 G6
02h
08h
01h
01h
96h
C5h
05h
20h
02h
05h
08h 08h 08h
14h 14h 14h
0Ah 08h 08h
08h 08h 08h
08h 08h 08h
13h 15h 1Ah
1Eh 1Eh 1Eh
Note
1
1
1
1
1
1
3
59h 59h 59h
AAh
00h
2
00h
2
00h
2
00h
2
00h
2
00h
2
00h
2
00h
2
00h
2
00h
2
00h
2
00h
2
04h
8Dh
32h
28h
11h 11h 11h
05h 05h 05h
90h 65h 2Ch
00h
-2-
Version 1.1 Oct. 2000
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