MSM6599 View Datasheet(PDF) - Oki Electric Industry
Part Name
Description
Manufacturer
MSM6599 Datasheet PDF : 11 Pages
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¡ Semiconductor
MSM6599B
• D0, D1, D2, D3
Display data input pins for the 80-bit latch (I). The display data is input at the falling edge of
clock pulse. Table 1 shows the relationship between display data, DF, LCD driver output, and
display.
Display Data
DF
L
L
H
L
L
H
H
H
Table 1
LCD Driver Output
Non-select level (V3)
Select level (V1)
Non-select level (V4)
Select level (VEE)
Display
OFF
ON
OFF
ON
• SHL
Input pin to select the loading direction of display data. Set this pin to "H" or "L" level during
power-on. Table 2 shows the relationship between shift direction of data (D0 to D3) and driver
output (O1 to O80).
SHL
L
H
Table 2
Direction of Data Loading
D0 Æ O1 Æ O5
D1 Æ O2 Æ O6
D2 Æ O3 Æ O7
D3 Æ O4 Æ O8
Æ O77
Æ O78
Æ O79
Æ O80
D0 Æ O80 Æ O76
D1 Æ O79 Æ O75
D2 Æ O78 Æ O74
D3 Æ O77 Æ O73
Æ O4
Æ O3
Æ O2
Æ O1
Last Data
First Data
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