MSM6648 View Datasheet(PDF) - Oki Electric Industry
Part Name
Description
Manufacturer
MSM6648 Datasheet PDF : 9 Pages
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¡ Semiconductor
MSM6648
• CP
This is a clock pulse input pin for two 50-bit bi-directional shift registers. Scan data is shifted
at the falling edge of a clock pulse.
• DF
This is an input pin for an LCD drive waveform AC synchronization signal, which generally
inputs a frame inversion signal. See the Truth Table.
• DISP OFF
This is an input pin used to control the output pins O1 to O100. Signals on the V1 level are
output from the output pins O1 to O100, independent of the shift register data during low
signal input. See the Truth Table.
• O1 to O100
These are 4-level driver output pins, directly corresponding to each bit of the shift register.
DF signals combined to shift register data select and output any of four levels V1, V2, V5, and
VEE.
• VDD, VSS
These are power supply pins. VDD is normally 2.7 to 5.5 V. VSS is a grounding pin, which
is normally set to 0 V.
• V1L, V2L, V5L, VEEL, V1R, V1R, V5R, VEER
These are LCD drive bias voltage pins. The V1 pin may be separated from the VDD pin. Bias
supply voltages are supplied from an external source.
Truth Table
DF
L
L
H
H
¥
¥ : Don't care
Shift register data
L
H
L
H
¥
NOTES ON USE
DISP OFF
H
H
H
H
L
Driver output (O1 to O100)
V2
VEE
V5
V1
V1
Note the following when turning power on and off:
The LCD drivers of this IC requires a high voltage. If a high voltage is applied to them with the
logic power supply floating, excess current flows. This may damage the IC. Be sure to carry out
the following power-on and power-off sequences.
When turning power on:
First turn on the logic circuits, then the LCD drivers, or turn on both of them at the same time.
When turning power off:
First turn off the LCD drivers, then the logic circuits, or turn off both of them at the same time.
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