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MSM7532 View Datasheet(PDF) - Oki Electric Industry

Part Name
Description
Manufacturer
MSM7532 Datasheet PDF : 21 Pages
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¡ Semiconductor
MSM7532
The DC clamp level is VSG ±VLIML.
LIML
+
Inverter
From LPF1
Limiter
To splatter filter
CPDL
Input DC voltage reference level definition pin for compander.
One of the voltages into which the voltage between VREF pin and SGO pin is divided by the resistors
should be supplied to this pin. Refor to the VREF description for voltage division by the resistors.
If the potential difference between this pin and the SGO pin is VCPDL, the compressor and expander
input reference levels are expressed as follows.
VICS = VIES = 20 · log (VCPDL) – 5.8 (dBV)
The compressor input reference level and expander input reference level change simultaneously.
SGI
Built-in signal ground that is reference voltage to be supplied to analog circuit.
The DC voltage is one half of the supply voltage.
When the power has fewer noises and fewer ripples, the idle noise can be improved by inserting a
bypass capacitor over 1 mF between SGI and GND, and between SGI and VDD. If the power has a lot
of noises, do not insert a bypass capacitor between SGI and VDD to reduce supply noises.
Other capacitors and resistors should be connected to the SGO pin.
SGO
Signal ground voltage output pin for LSI external circuits.
The DC voltage is one half of the supply voltage.
Insert a 1 mF capacitor between SGO and GND.
VDD
To internal circuit
SG voltage
generation circuit
C2
SGI
C3
+
SGO
C25
BR
MODEM data signaling rate switching input.
BR Data Signaling Rate Note
0
1200 bps
SW8
1
2400 bps
CE3P, CE3N
Pins used to connect a capacitor for defining a time constant of output transient response for the
expander.
Insert a 0.22 mF capacitor between CE3N and CE3P.
8/21

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