MSM9845 View Datasheet(PDF) - Oki Electric Industry
Part Name
Description
Manufacturer
MSM9845 Datasheet PDF : 9 Pages
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1Semiconductor
FEDL9845DIGEST-01
MSM9845
PIN DESCRIPTION
Pin
11 - 14
16 - 19
1-4
6-9
38
39
40
41
42
32
35
36
37
34
51
Symbol
D15 to D8
D7 to D0
WR
RD
CS
D/C
BUSY
CBUSY
EMP
MID
FUL/
DREQR
CH/
DACKR
DREQL
Type
I/O
I/O
I
I
I
I
O
O
O
O
O
I
O
Description
When 8-bit bus interface selected, you can define, by using a command, these
pins as input/output to/from external memory. When no definition made, these
pins are input mode.
When 16-bit bus interface selected, they are one half of bi-directional data bus for
data input/output from/to external micro-controller and memory.
Another half of bi-directional data bus for data input/output from/to external
micro-controller and memory and for status output.
WRITE pulse input pin. Input “L” pulse before you can enter command and data
to D15 to D0 pins.
READ pulse input pin. Input “L” pulse before the LSI can output status and data to
D15 to D0 pins.
With this pin at “L” level, the LSI accepts WRITE or READ pulse input. At “H” level
the LSI would not accept WRITE or READ pulse.
While this pin being held “H”, D15 to D0 pins are enabled to input/output sound
data. While this pin being held “L”, D7 to D0 pins are enabled to input a command
or output status data.
Output “L” level during playback/PAUSE operation.
Output “L” level when the LSI is ready to accept a command.
“H” level output from this pin indicates FIFO memory is empty. You can change
this pin to “L” active by a command input.
“H” level output from this pin indicates FIFO memory is more than half.
During playback, voice synthesis starts when MID changes to “H” level.
You can change this pin to “L” active by a command input. This pin outputs a
synchro signal for voice data input / output when non-use of FIFO is selected.
“H” level output from this pin indicates FIFO memory is full. During playback
operation this pin is held “H” and FIFO memory is write -disabled.
You can change this pin to “L” active by a command input.
When DMA Transfer and stereo-playback selected by the command input, the
output from this pin becomes DMA Transfer request signal. The pin outputs “H”
when the right channel FIFO memory is empty. You can change this pin to “L”
active by a command input.
When stereo-playback selected, write sound data to the right channel FIFO at “H”
level, while data to the left channel FIFO at “L” level. When monaural playback
selected, keep this pin “L”. You can change this pin to “L” active by a command
input.
When DMA Transfer and stereo-playback selected by the command input, this
pin acknowledges the right channel DMA Transfer permission signal.
With this pin at “L” level the LSI enabled the IOW pin to accept the signal. You can
change this pin to “H” active by a command input.
Output “H” level to represent DMA Transfer request signal when FIFO gets
empty. If stereo-playback selected, the pin outputs “H” level to represent DMA
Transfer request signal when the left channel FIFO gets empty.
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