MT41J128M8 View Datasheet(PDF) - Micron Technology

Part Name

Description

Manufacturer

MT41J128M8

DDR3 SDRAM

Micron Technology 

Figure 121: Transition Period for Short CKE LOW Cycles with Entry and Exit Period Overlapping

T0

CK#

CK

Command REF

CKE

T1

T2

T3

T4

T5

T6

T7

T8

T9

Ta0

Ta1

Ta2

Ta3

Ta4

NOP

NOP

NOP

NOP

NOP

NOP

NOP

NOP

NOP

NOP

NOP

NOP

NOP

NOP

tANPD

PDE transition period

tRFC (MIN)

PDX transition period

tANPD

Short CKE low transition period (R TT change asynchronous or synchronous)

tXPDLL

Note: 1. AL = 0, WL = 5, tANPD = 4.

Indicates break

in time scale

Transitioning

Don’t Care

Figure 122: Transition Period for Short CKE HIGH Cycles with Entry and Exit Period Overlapping

T0

T1

T2

T3

T4

T5

T6

T7

T8

T9

Ta0

Ta1

Ta2

Ta3

Ta4

CK#

CK

Command NOP

NOP

NOP

NOP

NOP

NOP

NOP

NOP

NOP

NOP

NOP

NOP

NOP

NOP

NOP

CKE

tANPD

tXPDLL

tANPD

Short CKE HIGH transition period (RTT change asynchronous or synchonous)

Note: 1. AL = 0, WL = 5, tANPD = 4.

Indicates break

in time scale

Transitioning

Don’t Care

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