MT48LC1M16A1 View Datasheet(PDF) - Micron Technology

Part Name

Description

Manufacturer

MT48LC1M16A1

SYNCHRONOUS DRAM

Micron Technology 

COMMAND INHIBIT

The COMMAND INHIBIT function prevents new

commands from being executed by the SDRAM, re-

gardless of whether the CLK signal is enabled. The

SDRAM is effectively deselected. Operations already in

progress are not affected.

NO OPERATION (NOP)

The NO OPERATION (NOP) command is used to

perform a NOP to an SDRAM which is selected (CS# is

LOW). This prevents unwanted commands from being

registered during idle or wait states. Operations already

in progress are not affected.

LOAD MODE REGISTER

The Mode Register is loaded via inputs A0-A10 and

BA. See Mode Register heading in Register Definition

section. The LOAD MODE REGISTER command can

only be issued when all banks are idle, and a subsequent

executable command cannot be issued until tMRD is

met.

ACTIVE

The ACTIVE command is used to open (or activate)

a row in a particular bank for a subsequent access. The

value on the BA input selects the bank, and the address

provided on inputs A0-A10 selects the row. This row

remains active (or open) for accesses until a PRECHARGE

command is issued to that bank. A PRECHARGE com-

mand must be issued before opening a different row in

the same bank.

READ

The READ command is used to initiate a burst read

access to an active row. The value on the BA input

selects the bank, and the address provided on inputs

A0-A7 selects the starting column location. The value

on input A10 determines whether or not AUTO

PRECHARGE is used. If AUTO PRECHARGE is selected,

the row being accessed will be precharged at the end of

the READ burst; if AUTO PRECHARGE is not selected,

the row will remain open for subsequent accesses. Read

data appears on the DQs, subject to the logic level on

the DQM inputs two clocks earlier. If a given DQM

signal was registered HIGH, the corresponding DQs

will be High-Z two clocks later; if the DQM signal was

registered LOW, the DQs will provide valid data.

WRITE

The WRITE command is used to initiate a burst

write access to an active row. The value on the BA input

selects the bank, and the address provided on inputs

16Mb: x16

IT SDRAM

A0-A7 selects the starting column location. The value

on input A10 determines whether or not AUTO

PRECHARGE is used. If AUTO PRECHARGE is selected,

the row being accessed will be precharged at the end of

the WRITE burst; if AUTO PRECHARGE is not selected,

the row will remain open for subsequent accesses.

Input data appearing on the DQs is written to the

memory array subject to the DQM input logic level

appearing coincident with the data. If a given DQM

signal is registered LOW, the corresponding data will be

written to memory; if the DQM signal is registered

HIGH, the corresponding data inputs will be ignored,

and a WRITE will not be executed to that byte/column

location.

PRECHARGE

The PRECHARGE command is used to deactivate

the open row in a particular bank or the open row in

all banks. The bank(s) will be available for a subsequent

row access a specified time (tRP) after the PRECHARGE

command is issued. Input A10 determines whether one

or all banks are to be precharged, and in the case where

only one bank is to be precharged, input BA selects the

bank. Otherwise BA is treated as “Don’t Care.” Once a

bank has been precharged, it is in the idle state and

must be activated prior to any READ or WRITE com-

mands being issued to that bank.

AUTO PRECHARGE

AUTO PRECHARGE is a feature which performs the

same individual-bank PRECHARGE function described

above, but without requiring an explicit command.

This is accomplished by using A10 to enable AUTO

PRECHARGE in conjunction with a specific READ or

WRITE command. A precharge of the bank/row that is

addressed with the READ or WRITE command is auto-

matically performed upon completion of the READ or

WRITE burst, except in the full-page burst mode, where

AUTO PRECHARGE does not apply. AUTO

PRECHARGE is nonpersistent in that it is either enabled

or disabled for each individual READ or WRITE com-

mand.

AUTO PRECHARGE ensures that the PRECHARGE

is initiated at the earliest valid stage within a burst. The

user must not issue another command to the same

bank until the precharge time (tRP) is completed. This

is determined as if an explicit PRECHARGE command

was issued at the earliest possible time, as described for

each burst type in the Operation section of this data

sheet.

16Mb: x16 IT SDRAM

16MSDRAMx16IT.p65 – Rev. 5/99

10

Micron Technology, Inc., reserves the right to change products or specifications without notice.

©1999, Micron Technology, Inc.

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