MT8926 View Datasheet(PDF) - Mitel Networks
Part Name
Description
Manufacturer
MT8926 Datasheet PDF : 26 Pages
| |||
MT8926
Bit
Name
Description
7-0
CRC
CRC Error Counter. This is an 8 bit counter, which is incremented when the LSB of
the MT8976/77 CRC counter toggles. The CRC error counter will wrap around after
reaching terminal count (i.e., 11111111 to 00000000). This will also set bit 2 (CSI) of
master status word 2. CRC is reset when bit 5 in the PMAC Control Word is toggled
from high to low. This counter is invalid when a SF mode T1 signal is being
received.
Table 9. CRC-6 Error Counter (CSTo Channel 11)
Bit
Name
Description
7-0
BPV
Bipolar Violation Counter. This is an 8 bit counter, which is incremented when a line
code violation is detected by the MT8926. The counter will wrap around upon
reaching terminal count (11111111 to 00000000). This will also set bit 1 (BSI) of
master status word 2. BPV is reset when bit 4 in the PMAC Control Word is toggled
from high to low.
Table 10. Bipolar Violation Counter (CSTo Channel 23)
Bit
Name
Description
7-5
BlAlm, FrCnt These bits (Blue Alarm, Frame Count and External Status) contain information from
& Xst
the MT8976/77 that is unaltered by the MT8926. See Master Status Word 2 of the
MT8976/77 data sheet.
4
SEI
Severely Errored Framing Event Indication. This bit goes high when the SE counter
is incremented (i.e., when the LSB of the SE counter toggles). It goes low when bit 7
(SER) of the PMAC Control Word (Table 14, CSTi1 channel 11) is changed from
high to low. It can also be cleared by a low on the INTA bit of the PMAC Control
Word and will remain clear as long as the INTA bit is low.
3
FSI
Framing Error Counter Saturation Indication. This bit is set when the FE counter
overflows its terminal count (i.e., 1111 to 0000). It will be reset low when bit 6 (FER)
of the PMAC Control Word (Table 14, CSTi1 channel 11) is changed from high to
low.
2
CSI
CRC Error Counter Saturation Indication. This bit is set when the CRC counter
overflows its terminal count (i.e., 11111111 to 00000000). It will be reset when bit 5
(CRCR) of the PMAC Control Word (Table 14, CSTi1 channel 11) is changed from
high to low. Valid for ESF only.
1
BSI
Bipolar Violation Counter Saturation Indication. This bit is set when the BPV
counter overflows its terminal count (11111111 to 00000000). It will be reset when bit
4 (BPVR) of the PMAC Control Word (Table 14, CSTi1 channel 11) is changed from
high to low.
0
AIS
Alarm Indication Signal. This bit is set when the MT8976/77 has lost synchronization
and less than three zeros are detected in any 250 microsecond interval. It is reset
when three or more zeros are detected in a 250 microsecond interval or when
synchronization is regained.
Table 11. Master Status Word 2 (CSTo Channel 31)
11111111. When the BPV counter wraps around the
BPV Saturation Indication bit (BSI) will be set, Table
11, and a G2 interrupt will be asserted. Similarly,
when the CRC counter wraps around the CRC
Saturation Indication bit (CSI) will be set and a G2
interrupt will be asserted.
The BPV and CRC counters, as well as the BSI and
CSI bits, are cleared by a high-to-low transition of bit
4, BPV Counter Reset (BPVR), and bit 5, CRC
Counter Reset (CRCR), of the PMAC Control Word
channel 11 CSTi1, Table 14.
4-13
Share Link: 