NCP5173(2004) View Datasheet(PDF) - ON Semiconductor
Part Name
Description
Manufacturer
NCP5173 Datasheet PDF : 18 Pages
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NCP5173
VCC ripple
IIN
IL
Figure 27. Boost Input Voltage and Current
Ripple Waveforms
IIN
IL
VCC
+
−
CIN
RESR
Figure 28. Boost Circuit Effective Input Filter
The situation is different in a flyback circuit. The input
current is discontinuous and a significant pulsed current is
seen by the input capacitors. Therefore, there are two
requirements for capacitors in a flyback regulator: energy
storage and filtering. To maintain a stable voltage supply to
the chip, a storage capacitor larger than 20 mF with low ESR
is required. To reduce the noise generated by the inductor,
insert a 1.0 mF ceramic capacitor between VCC and ground
as close as possible to the chip.
Output Capacitor Selection
VOUT ripple
IL
By examining the waveforms shown in Figure 29, we can
see that the output voltage ripple comes from two major
sources, namely capacitor ESR and the charging/
discharging of the output capacitor. In boost circuits, when
the power switch turns off, IL flows into the output capacitor
causing an instant DV = IIN × ESR. At the same time, current
IL − IOUT charges the capacitor and increases the output
voltage gradually. When the power switch is turned on, IL is
shunted to ground and IOUT discharges the output capacitor.
When the IL ripple is small enough, IL can be treated as a
constant and is equal to input current IIN. Summing up, the
output voltage peak−peak ripple can be calculated by:
VOUT(RIPPLE)
+
(IIN
* IOUT)(1 *
(COUT)(f)
D)
)
IOUTD
(COUT)(f)
)
IIN
ESR
The equation can be expressed more conveniently in
terms of VCC, VOUT and IOUT for design purposes as
follows:
VOUT(RIPPLE)
+
IOUT(VOUT * VCC)
(COUT)(f)
1
(COUT)(f)
)
(IOUT)(VOUT)(ESR)
VCC
The capacitor RMS ripple current is:
IRIPPLE + Ǹ(IIN * IOUT)2(1 * D))(IOUT)2(D)
Ǹ + IOUT
VOUT * VCC
VCC
Although the above equations apply only for boost
circuits, similar equations can be derived for flyback
circuits.
Reducing the Current Limit
In some applications, the designer may prefer a lower
limit on the switch current than 1.5 A. An external shunt can
be connected between the VC pin and ground to reduce its
clamp voltage. Consequently, the current limit of the
internal power transistor current is reduced from its nominal
value.
The voltage on the VC pin can be evaluated with the
equation:
VC + ISWREAV
where:
RE = .063 W, the value of the internal emitter resistor;
AV = 5.0 V/V, the gain of the current sense amplifier.
Since RE and AV cannot be changed by the end user, the
only available method for limiting switch current below
1.5 A is to clamp the VC pin at a lower voltage. If the
maximum switch or inductor current is substituted into the
equation above, the desired clamp voltage will result.
Figure 29. Typical Output Voltage Ripple
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