NJU26100 View Datasheet(PDF) - Japan Radio Corporation

Part Name

Description

Manufacturer

NJU26100

NJU26100 Series Hardware Specification

Japan Radio Corporation  

NJU26100 Series

3. Audio Clock

Audio data samples must be transferred in synchronism between all components of the digital audio system.

That is, for each audio sample originated by an audio source there must be one and only one audio sample

processed by the NJU26100 Series and delivered to the D/A converters. To accomplish this, one device in the

system is selected to generate the audio sample rate; the remaining devices are designated to follow this sample

rate. The device that generates the audio sample rate is called the MASTER device; all devices following this

sample rate are called SLAVE(s).

LR, BCK and MCK should be synchronized. This is described in next section. When the NJU26100 Series is in

MASTER mode, the NJU26100 Series system clock should be 768 multiples of the sampling frequency (Table3-1).

When the NJU26100 Series is in SLAVE mode, NJU26100 Series system clock should be from 768 multiples of

the sampling frequency up to the maximum operating frequency.

3.1 System Clock

Three types of clock signals are included in the serial audio interface. Two of the clock signals LR (LRI and LRO)

and BCK (BCKI and BCKO) establish data transfer on the serial data lines. The third clock, MCK, is not associated

with serial data transfer but is required by delta-sigma A/D and D/A converters.

The frequency of the LR clock is, by definition, equal to the digital audio sample rate, Fs. BCK and MCK operate

at multiples of the LR clock rate. Therefore the signals LR, BCK and MCK must be locked, that is, they must be

generated or derived from a single frequency reference. In SLAVE mode, the NJU26100 Series dose not generate

MCK clock.

Table 3-1 Sampling Frequency and BCK, MCK, XI

Clock Signal Multiple Frequency

32kHz

44.1kHz

48kHz

LR

1Fs

32kHz

44.1kHz

48kHz

BCK(32Fs)

32Fs

1.024MHz

1.4112MHz

1.536MHz

BCK(64Fs)

64Fs

2.048MHz

2.822MHz

3.072MHz

MCK(256Fs)

256Fs

8.192MHz

11.289MHz

12.288MHz

MCK(384Fs)

384Fs

12.288MHz

16.934MHz

18.432MHz

XI

768Fs

24.576MHz

33.8688MHz

36.864MHz

SDIx

SDOx

BCKI

LRI

BCKO

LRO

MCK

CLOCK

DIVIDER

XI

XO

Oscillator

MAS TER

SLAVE

Fig. 3-1 MASTER / SLAVE Mode

-6-

Ver.2005-02-24

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