NXP Semiconductors
PCF8562
Universal LCD driver for low multiplex rates
7.4.3 1:3 Multiplex drive mode
When three backplanes are provided in the LCD, the 1:3 multiplex drive mode applies
(see Figure 7).
BP0
BP1
BP2
Sn
Sn+1
Sn+2
VLCD
2VLCD / 3
VLCD / 3
VSS
VLCD
2VLCD / 3
VLCD / 3
VSS
VLCD
2VLCD / 3
VLCD / 3
VSS
VLCD
2VLCD / 3
VLCD / 3
VSS
VLCD
2VLCD / 3
VLCD / 3
VSS
VLCD
2VLCD / 3
VLCD / 3
VSS
state 1
state 2
VLCD
2VLCD / 3
VLCD / 3
0V
−VLCD / 3
−2VLCD / 3
−VLCD
VLCD
2VLCD / 3
VLCD / 3
0V
−VLCD / 3
−2VLCD / 3
−VLCD
Tfr
LCD segments
state 1
state 2
(a) Waveforms at driver.
(b) Resultant waveforms
at LCD segment.
mgl748
(1) Vstate1(t) = VSn(t) − VBP0(t).
(2) Von(RMS) = 0.638VLCD.
(3) Vstate2(t) = VSn+1(t) − VBP1(t).
(4) Voff(RMS) = 0.333VLCD.
Fig 7. Waveforms for the 1:3 multiplex drive mode with 1⁄3 bias
PCF8562_3
Product data sheet
Rev. 3 — 2 December 2008
© NXP B.V. 2008. All rights reserved.
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