PCF8577CT View Datasheet(PDF) - NXP Semiconductors.

Part Name

Description

Manufacturer

PCF8577CT

LCD direct/duplex driver with I²C-bus interface

NXP Semiconductors. 

NXP Semiconductors

PCF8577C

LCD direct/duplex driver with I²C-bus interface

8.3 I2C-bus protocol

The PCF8577C I2C-bus protocol is shown in Figure 10.

The PCF8577C is a slave receiver and has a fixed slave address (see Table 7). All

PCF8577Cs with the same slave address acknowledge the slave address in parallel.

The second byte is always the control byte and is loaded into the control register of each

PCF8577C connected to the I2C-bus. All addressed devices acknowledge the control

byte. Subsequent data bytes are loaded into the segment registers of the selected device.

Any number of data bytes may be loaded in one transfer and in an expanded system

rollover of the SBV from 111 111 to 000 000 is allowed. If a STOP (P) condition is given

after the control byte acknowledge, the segment data remains unchanged. This allows the

BANK bit to be toggled without changing the segment register contents. During loading of

segment data, only the selected PCF8577C gives an acknowledge. Loading is terminated

by generating a STOP (P) condition.

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Fig 10. I2C-bus protocol

DDD

9. Safety notes

CAUTION

This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling

electrostatic sensitive devices.

Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A or

equivalent standards.

CAUTION

Static voltages across the liquid crystal display can build up when the LCD supply voltage

(VLCD) is on while the IC supply voltage (VDD) is off, or vice versa. This may cause unwanted

display artifacts. To avoid such artifacts, VLCD and VDD must be applied or removed together.

CAUTION

Semiconductors are light sensitive. Exposure to light sources can cause the IC to

malfunction. The IC must be protected against light. The protection must be applied to all

sides of the IC.

PCF8577C

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 5 — 10 October 2014

© NXP Semiconductors N.V. 2014. All rights reserved.

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