ST72C216G1M7 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
ST72C216G1M7
STMicroelectronics
ST72C216G1M7 Datasheet PDF : 135 Pages
| |||
ST72104G, ST72215G, ST72216G, ST72254G
PIN DESCRIPTION (Cont’d)
For external pin connection guidelines, refer to Section 13 ”ELECTRICAL CHARACTERISTICS” on page
96.
Legend / Abbreviations for Table 1:
Type:
I = input, O = output, S = supply
Input level: A = Dedicated analog input
In/Output level: C = CMOS 0.3VDD/0.7VDD,
CT= CMOS 0.3VDD/0.7VDD with input trigger
Output level: HS = 20mA high sink (on N-buffer only)
Port and control configuration:
– Input:
float = floating, wpu = weak pull-up, int = interrupt 1), ana = analog
– Output: OD = open drain 2), PP = push-pull
Refer to Section 9 ”I/O PORTS” on page 30 for more details on the software configuration of the I/O ports.
The RESET configuration of each pin is shown in bold. This configuration is valid as long as the device is
in reset state.
Table 1. Device Pin Description
Pin n°
Pin Name
Level
Port / Control
Input
Main
Output Function
(after reset)
Alternate Function
1 1 RESET
2 2 OSC1 3)
I/O CT
I
3 3 OSC2 3)
O
4 4 PB7/SS
5 5 PB6/SCK/ISPCLK
I/O CT
I/O CT
6 6 PB5/MISO/ISPDATA I/O CT
7 7 PB4/MOSI
8
NC
I/O CT
9
NC
10 8 PB3/OCMP2_A
11 9 PB2/ICAP2_A
12 10 PB1 /OCMP1_A
13 11 PB0 /ICAP1_A
I/O CT
I/O CT
I/O CT
I/O CT
14 12 PC5/EXTCLK_A/AIN5 I/O CT
15 13 PC4/OCMP2_B/AIN4 I/O CT
16 14 PC3/ ICAP2_B/AIN3 I/O CT
17 15 PC2/MCO/AIN2
I/O CT
X
X ei1
X ei1
X ei1
X ei1
X
Top priority non maskable interrupt (active low)
External clock input or Resonator oscillator in-
verter input or resistor input for RC oscillator
Resonator oscillator inverter output or capaci-
tor input for RC oscillator
X X Port B7
SPI Slave Select (active low)
X X Port B6
X X Port B5
X X Port B4
SPI Serial Clock or ISP Clock
SPI Master In/ Slave Out Data
or ISP Data
SPI Master Out / Slave In Data
Not Connected
X ei1
X ei1
X ei1
X ei1
X ei0/ei1
X X Port B3
X X Port B2
X X Port B1
X X Port B0
X X Port C5
X ei0/ei1
X X Port C4
X ei0/ei1 X X X Port C3
X ei0/ei1 X X X Port C2
Timer A Output Compare 2
Timer A Input Capture 2
Timer A Output Compare 1
Timer A Input Capture 1
Timer A Input Clock or ADC
Analog Input 5
Timer B Output Compare 2 or
ADC Analog Input 4
Timer B Input Capture 2 or
ADC Analog Input 3
Main clock output (fCPU) or
ADC Analog Input 2
8/135
6
Share Link: