EM78911
8-bit micro-controller
* Bit 2~4 (Bias1~Bias3) Control bits used to choose LCD operation voltage .
LCD operate voltage Vop (VDD 5V)
VDD=5V
000
0.60VDD
3.0V
001
0.66VDD
3.3V
010
0.74VDD
3.7V
011
0.82VDD
4.0V
100
0.87VDD
4.4V
101
0.93VDD
4.7V
110
0.96VDD
4.8V
111
1.00VDD
5.0V
* Bit5:port6 switch , 0/1= normal I/O port/COMMON output
* Bit6:port9 low nibble switch , 0/1= normal I/O port/SEGMENT output . Bit7:port9 high nibble switch
PAGE1 :
7
6
5
4
3
2
1
0
OP77 OP76 C2S C1S PSC1 PSC0 CDRD
0
* Bit0: unused
* Bit1: cooked data or raw data select bit , 0/1 ==> cooked data/raw data
* Bit3~Bit2: counter1 prescaler , reset=(0,0)
(PSC1,PSC0) = (0,0)=>1:1 , (0,1)=>1:4 , (1,0)=>1:8 , (1,1)=>reserved
* Bit4:counter1 source , (0/1)=(32768Hz/3.579MHz if enable) scale=1:1
* Bit5:counter2 source , (0/1)=(32768Hz/3.579MHz if enable) scale=1:1
* Bit6:P76 opendrain control (0/1)=(disable/enable)
* Bit7:P77 opendrain control (0/1)=(disable/enable)
10. IOCF (Interrupt Mask Register)
7
6
INT3
FSK/CW
5
4
321
0
C8_2 C8_1 INT2 INT1 INT0 TCIF
* Bit 0 ~ 7 interrupt enable bit.
0: disable interrupt
1: enable interrupt
* IOCF Register is readable and writable.
VII.3 TCC/WDT Prescaler
There is an 8-bit counter available as prescaler for the TCC or WDT. The prescaler is available for the TCC only or
WDT only at the same time.
• An 8 bit counter is available for TCC or WDT determined by the status of the bit 3 (PAB) of the CONT register.
• See the prescaler ratio in CONT register.
• Fig. 10 depicts the circuit diagram of TCC/WDT.
• Both TCC and prescaler will be cleared by instructions which write to TCC each time.
• The prescaler will be cleared by the WDTC and SLEP instructions, when assigned to WDT mode.
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