P80C592FFA View Datasheet(PDF) - Philips Electronics

Part Name

Description

Manufacturer

P80C592FFA

8-bit microcontroller with on-chip CAN

Philips Electronics 

Philips Semiconductors

8-bit microcontroller with on-chip CAN

Product specification

P8xC592

8 I/O PORT STRUCTURE

The P8xC592 has six 8-bit parallel ports: Port 0 to Port 5. In addition to the standard 8-bit parallel ports, the I/O facilities

also include a number of special I/O lines. The use of a Port 1, Port 3 or Port 4 pins as an alternative function is carried

out automatically provided the associated SFR bit is set HIGH.

Table 5 Default Port functions

PORT TYPE

FUNCTION

Port 0 I/O The same as in the 80C51

Port 1 I/O

Port 2 I/O

Port 3 I/O

Port 4 I/O Parallel l/O port

Port 5 I Parallel input port with an input function only

REMARKS

Except for the additional functions of P1.6 and

P1.7.

Parallel I/O function is identical to Port1, 2 and 3.

May be used as normal inputs if the ADC function

is inoperative.

Table 6 Alternative Port functions

PORT TYPE

FUNCTION

Port 0 I/O Multiplexed Low-order address and

Data bus for external memory (AD7 to AD0)

Port 1

Port 2

I/O Capture timer inputs for Timer T2

(CT0I to CT3I), or

External interrupt request inputs

(INT2 to INT5)

T2 event input (T2)

T2 timer reset input (RT2)

CAN transmitter output 0 (CTX0)

CAN transmitter output 1 (CTX1)

I/O High-order address byte for external memory

(A08 to A15)

Port 3

Port 4

Port 5

I/O Serial Input Port (RXD)

Serial Output Port (TXD)

External interrupt (INT0)

External interrupt (INT1)

Timer 0 external input (T0)

Timer 1 external input (T1)

External data memory Write strobe (WR)

External data memory Read strobe (RD)

I/O Compare and Set/Reset outputs

(CMSR0 to CMSR5)

Compare and toggle outputs (CMT0, CMT1)

I Input channels to ADC (ADC7 to ADC0)

REMARKS

Provides the multiplexed Low-order address and

data bus used for expanding the P8xC592 with

standard memories and peripherals.

External interrupt request inputs, if capture

information is not utilized.

External counter input.

External counter reset input.

CTX0 and CTX1 outputs of the CAN interface

(note 1).

Port 2 provides the High-order address bus when

the P8xC592 is expanded with external Program

Memory and/or external Data Memory.

Receiver input of serial port SIO0 (UART).

Transmitter output of serial port SIO0 (UART).

External interrupt request inputs.

Counter inputs.

Control signal to write to external Data Memory.

Control signal to read from external Data Memory.

Can be configured to provide signals indicating a

match between Timer counter T2 and its compare

registers.

Port 5 may be used in conjunction with the ADC

interface (note 2).

1996 Jun 27

15

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