4280-52 View Datasheet(PDF) - Peregrine Semiconductor Corp.
Part Name
Description
Manufacturer
4280-52 Datasheet PDF : 8 Pages
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Evaluation Kit
The SPDT Switch Evaluation Kit board was
designed to ease customer evaluation of the
PE4280 SPDT switch. The RFC port is connected
through a 75 Ω transmission line to J2. Port 1 and
Port 2 are connected through 75 Ω transmission
lines to J1 and J3. A through transmission line
connects F connectors J4 and J5. This
transmission line can be used to estimate the loss
of the PCB over the environmental conditions
being evaluated.
The board is constructed of a four metal layer
FR4 material with a total thickness of 0.062". The
transmission lines were designed using a
coplanar waveguide with ground plane (28 mil
core, 21 mil width, 30 mil gap).
J6 provides a means for controlling DC and digital
inputs to the device. The provided jumpers short
the package pin to ground for logic low. When the
jumper is removed, the pin is pulled up to VDD for
logic high.
When the jumper is in place, 3 µA of current will
flow through the 1 MΩ pull up resistor. This extra
current should not be attributed to the
requirements of the device.
Proper PCB design is essential for full isolation
performance. This eval board demonstrates good
trace and ground management for minimum
coupling and radiation.
J1
1
75 OHM T-Line
J2
1
75 OHM T-Line
©2010-11 Peregrine Semiconductor Corp. All rights reserved.
Page 4 of 8
PE4280
Product Specification
Figure 4. Evaluation Board Layouts
Peregrine Specification 101/0148~03A
Figure 5. Evaluation Board Schematic
Peregrine Specification 102/0195~02A
J6
HEADER 7X2
1 VDD
GND 2
3 GND
GND 4
5 VSS/GND GND 6
7 GND
GND 8
9 C1
GND 10
11 GND
GND 12
13 C2
GND 14
C1
R1
R2
DNI
1M
1M
1 GND
2 GND
3 RF1
4 GND
5 GND
21 GND
U1
PE4280
GND 15
GND 14
RF2 13
GND 12
GND 11
C2
C3
DNI
DNI
75 OHM T-Line
J3
1
J4
1
75 OHM T-Line
J5
1
Document No. 70-0164-05 │ UltraCMOS™ RFIC Solutions
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