LC868364A View Datasheet(PDF) - SANYO -> Panasonic

Part Name

Description

Manufacturer

LC868364A

8-Bit Single Chip Microcontroller with 64K-Byte ROM and 512-Byte RAM On Chip

SANYO -> Panasonic 

LC868364A

External Data Memory Timing

Parameter

Symbol

RD Pulse Width

tRLRH

Pads and Conditions

WR Pulse Width

tWLWH

Data Address Hold Time tLLAX For ADLC (read)

For ADLC (write)

Data Delay Time

tRLDV From RD

Data Hold Time

tRHDX From RD

Data Floating Time

tRHDZ From RD

Data Address Setting Time tAVLL

ADLC " Control Signal tLLRL

For ADLC

For RD

tLLWL For WR

Data Settling Time

tQVWL For WR

Data in WR =1

tQVWH

Data Hold Time

tWHQX From WR

Control Signal " ADLC tRHLH For RD

tWHLH For WR

Ratings

unit

VDD[V]

min.

max.

4.5 to 6.5 6tCLCL-80

ns

2.5 to 6.5 6tCLCL-320

4.5 to 6.5 6tCLCL-80

2.5 to 6.5 6tCLCL-320

4.5 to 6.5 3tCLCL-35

2.5 to 6.5 3tCLCL-140

4.5 to 6.5 2tCLCL-35

2.5 to 6.5 2tCLCL-140

4.5 to 6.5

5tCLCL-125

2.5 to 6.5

5tCLCL-400

4.5 to 6.5

0

2.5 to 6.5

0

4.5 to 6.5 2tCLCL-70 2tCLCL+70

2.5 to 6.5 2tCLCL-280 2tCLCL+280

4.5 to 6.5 2tCLCL-40

2.5 to 6.5 2tCLCL-160

4.5 to 6.5 3tCLCL-50 3tCLCL+50

2.5 to 6.5 3tCLCL-200 3tCLCL+200

4.5 to 6.5 3tCLCL-50 3tCLCL+50

2.5 to 6.5 3tCLCL-200 3tCLCL+200

4.5 to 6.5 tCLCL-60

2.5 to 6.5 tCLCL-240

4.5 to 6.5 7tCLCL-140

2.5 to 6.5 7tCLCL-560

4.5 to 6.5 tCLCL-50

2.5 to 6.5 tCLCL-200

4.5 to 6.5 tCLCL-50

tCLCL+50

2.5 to 6.5 tCLCL-200 tCLCL+200

4.5 to 6.5 tCLCL-50

tCLCL+50

2.5 to 6.5 tCLCL-200 tCLCL+200

Refer to figure 13.

SCLK

ADLC

EROE

RD

Port 0

WR

Port 0

tCLCL

1 tCYC

tLLRL

tAVLL tLLAX

(at reading)

tLLWL

tRLRH

tRLDV

tRHDX

DATA

tWLWH

tRHLH

tRHDZ

Z

tWHLH

tLLAX

(at writing)

A7-A0

tQVWL

tQVWH

tWHQX

Figure 13 Timing of the External RAM.

No.6722-26/29

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