PIC16F684 View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16F684

14-Pin, Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology

Microchip Technology 

PIC16F684

2.2.2.4 PIE1 Register

The PIE1 register contains the peripheral interrupt

enable bits, as shown in Register 2-4.

Note: Bit PEIE of the INTCON register must be

set to enable any peripheral interrupt.

REGISTER 2-4: PIE1: PERIPHERAL INTERRUPT ENABLE REGISTER 1

R/W-0

EEIE

bit 7

R/W-0

ADIE

R/W-0

CCP1IE

R/W-0

C2IE

R/W-0

C1IE

R/W-0

OSFIE

R/W-0

TMR2IE

R/W-0

TMR1IE

bit 0

Legend:

R = Readable bit

-n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

EEIE: EE Write Complete Interrupt Enable bit

1 = Enables the EE write complete interrupt

0 = Disables the EE write complete interrupt

bit 6

ADIE: A/D Converter (ADC) Interrupt Enable bit

1 = Enables the ADC interrupt

0 = Disables the ADC interrupt

bit 5

CCP1IE: CCP1 Interrupt Enable bit

1 = Enables the CCP1 interrupt

0 = Disables the CCP1 interrupt

bit 4

C2IE: Comparator 2 Interrupt Enable bit

1 = Enables the Comparator 2 interrupt

0 = Disables the Comparator 2 interrupt

bit 3

C1IE: Comparator 1 Interrupt Enable bit

1 = Enables the Comparator 1 interrupt

0 = Disables the Comparator 1 interrupt

bit 2

OSFIE: Oscillator Fail Interrupt Enable bit

1 = Enables the oscillator fail interrupt

0 = Disables the oscillator fail interrupt

bit 1

TMR2IE: Timer2 to PR2 Match Interrupt Enable bit

1 = Enables the Timer2 to PR2 match interrupt

0 = Disables the Timer2 to PR2 match interrupt

bit 0

TMR1IE: Timer1 Overflow Interrupt Enable bit

1 = Enables the Timer1 overflow interrupt

0 = Disables the Timer1 overflow interrupt

DS41202F-page 14

© 2007 Microchip Technology Inc.

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