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MTV212M64 View Datasheet(PDF) - Myson Century Inc

Part Name
Description
Manufacturer
MTV212M64
Myson
Myson Century Inc Myson
MTV212M64 Datasheet PDF : 27 Pages
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MYSON
TECHNOLOGY
MTV212M64
(Rev. 1.2)
9. A/D converter
The MTV212M is equipped with four 6-bit A/D converters, S/W can select the current convert channel by
setting the SADC1/SADC0 bit. The refresh rate for the ADC is OSC freq./12288. The ADC compare the input
pin voltage with internal VDD*N/64 voltage (where N = 0 - 63). The ADC output value is N when pin voltage
is greater than VDD*N/64 and smaller than VDD*(N+1)/64.
Reg name addr
bit7
bit6
bit5
ADC
10h (w) ENADC
ADC
10h (r)
WDT
18h (w) WEN WCLR
bit4
bit3
bit2
bit1
bit0
SADC3 SADC2 SADC1 SADC0
ADC convert Result
WDT2 WDT1 WDT0
WDT (w) :
Watchdog Timer control register.
WEN
= 1 Enable WatchDog Timer.
WCLR
= 1 Clear WatchDog Timer.
WDT2: WDT0 = 0 overflow interval = 8 x 0.25 sec.
= 1 overflow interval = 1 x 0.25 sec.
= 2 overflow interval = 2 x 0.25 sec.
= 3 overflow interval = 3 x 0.25 sec.
= 4 overflow interval = 4 x 0.25 sec.
= 5 overflow interval = 5 x 0.25 sec.
= 6 overflow interval = 6 x 0.25 sec.
= 7 overflow interval = 7 x 0.25 sec.
ADC (w) :
ADC control.
ENADC
=1
SADC0
=1
SADC1
=1
SADC2
=1
SADC3
=1
Enable ADC.
Select ADC0 pin input.
Select ADC1 pin input.
Select ADC2 pin input.
Select ADC3 pin input.
ADC (r) :
ADC convert result.
10. USB Engine
The USB engine includes the Serial Interface Engine (SIE), the low-speed USB I/O transceiver and the 3.3
Volt Regulator. The SIE block performs most of the USB interface function with only minimum support from
S/W. Two endpoints are supported. Endpoint 0 is used to receive and transmit control (including SETUP)
packets while Endpoint 1 is only used to transmit data packets.
The USB SIE handles the following USB bus activity independently:
1. Bitstuffing/unstuffing
2. CRC generation/checking
3. ACK/NAK
4. TOKEN type identification
5. Address checking
S/W handles the following tasks:
1. Coordinate enumeration by responding to SETUP packets
2. Fill and empty the FIFOs
3. Suspend/Resume coordination
4. Verify and select DATA toggle values
10.1 USB Device Address
The USBADR register stores the device address. This register is reset to all 0 after chip reset or USB bus
Revision 1.2
- 18 -
2000/07/04

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