S25FL127S View Datasheet(PDF) - Spansion Inc.
Part Name
Description
Manufacturer
S25FL127S Datasheet PDF : 131 Pages
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Data Sheet (Preliminary)
6.4
AC Characteristics
Table 6.5 AC Characteristics
Symbol
Parameter
Min
Typ
Max
FSCK, R
SCK Clock Frequency for READ and 4READ
instructions
DC
50
SCK Clock Frequency for single commands as
FSCK, C shown in Table 10.2, S25FL127S Command Set
DC
108
(sorted by function) on page 71 (4)
SCK Clock Frequency for the following dual and
FSCK, C quad commands: DOR, 4DOR, QOR, 4QOR, DIOR,
DC
108
4DIOR, QIOR, 4QIOR
FSCK, QPP
PSCK
tWH, tCH
tWL, tCL
tCRT, tCLCH
tCFT, tCHCL
tCS
SCK Clock Frequency for the QPP, 4QPP commands
SCK Clock Period
Clock High Time (5)
Clock Low Time (5)
Clock Rise Time (slew rate)
Clock Fall Time (slew rate)
CS# High Time (Read Instructions) CS# High Time
(Read Instructions when Reset feature and Quad
mode are both enabled) CS# High Time (Program/
Erase Instructions)
DC
1/ FSCK
50% PSCK -5%
50% PSCK -5%
0.1
0.1
10
20 (7)
50
80
∞
50% PSCK +5%
50% PSCK +5%
tCSS
CS# Active Setup Time (relative to SCK)
3
tCSH
CS# Active Hold Time (relative to SCK)
3
tSU
Data in Setup Time
3
tHD
Data in Hold Time
2
tV
Clock Low to Output Valid
1
8.0 (2)
7.65 (3)
6.5 (4)
tHO
Output Hold Time
2
Output Disable Time (6)
tDIS
Output Disable Time (when Reset feature and Quad
mode are both enabled)
8
20 (7)
tWPS
WP# Setup Time
20 (1)
tWPH
WP# Hold Time
100 (1)
tHLCH
HOLD# Active Setup Time (relative to SCK)
3
tCHHH
HOLD# Active Hold Time (relative to SCK)
3
tHHCH
HOLD# Non Active Setup Time (relative to SCK)
3
tCHHL
HOLD# Non Active Hold Time (relative to SCK)
3
tHZ
HOLD# enable to Output Invalid
8
tLZ
HOLD# enable to Output Valid
8
Notes:
1. Only applicable as a constraint for WRR instruction when SRWD is set to a 1.
2. Full VCC range (2.7 - 3.6V) and CL = 30 pF.
3. Regulated VCC range (3.0 - 3.6V) and CL = 30 pF.
4. Regulated VCC range (3.0 - 3.6V) and CL = 15 pF.
5. ±10% duty cycle is supported for frequencies ≤ 50 MHz.
6. Output High -Z is defined as the point where data is no longer driven.
7. tCS and tDIS require additional time when the Reset feature and Quad mode are enabled (CR2V[5]=1 and CR1V[1]=1).
Unit
MHz
MHz
MHz
MHz
ns
ns
V/ns
V/ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
April 25, 2013 S25FL127S_00_02
S25FL127S
41
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