S5L9284 View Datasheet(PDF) - Samsung
Part Name
Description
Manufacturer
S5L9284 Datasheet PDF : 24 Pages
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S5L9284D
DIGITAL SIGNAL PROCESSOR
PIN DESCRIPTION
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Symbol
AVDD1
DPDO
DPFIN
DPFOUT
CNTVOL
AVSS1
DATX
XIN
XOUT
WDCH1
LRCH1
SADT1
DVSS1
BCK1
C2PO
TIM2
/BCK1
/BCK2
BCK2
LRCH2
SADT2
TEST0
WDCH2
EMPH
LKFS
S0S1
RESET
SQEN
SQCK
SQDT
SQOK
I/O
Description
− Analog supply voltage 1
O Charge pump output for master PLL
I Filter input for master PLL
O Filter output for master PLL
I VCO control voltage for master PLL
− Analog ground 1
O Digital audio output
I X-tal oscillator input (16.9344MHz / 33.8688MHz)
O X-tal oscillator output
O Word clock of 48 bits/slot
O Channel clock of 48 bits/slot
O Serial audio data output with 48 bits/slot
− Digital ground 1
O Serial audio data bit clock for 48 bits/slot
O C2 pointer for serial audio data
O Normal or double speed control output pin
O Inverted clock of BCK1
O Inverted clock of BCK2
O Serial audio data bit clock for 64 bits/slot
O Channel clock for 64 bits/slot
O Serial audio data output with 64 bits/slot
I Test input pin (“L”: normal, “H”: test)
O Word clock of 64 bit/slot
O Emphasis/Non-emphasis output (“H”: Emphasis)
O The lock status output of frame sync
O Output of subcode sync signal (S0 + S1)
I System reset at Low
I SQCK control input (“L”: internal clock, “H”: external clock)
I/O Subcode-Q data bit clock
O Subcode-Q data serial output
O The CRC check result signal output of subcode-Q
4
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