S5L9291X01-T0R0 View Datasheet(PDF) - Samsung
Part Name
Description
Manufacturer
S5L9291X01-T0R0 Datasheet PDF : 88 Pages
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S5L9291X
PIN DESCRIPTION
Pin No
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
Symbol
VDDA_PLL
VSSA_PLL
VCO1LF
VCO2LF
VSSD_PLL
VDDD_PLL
PBCK
VDDD1
XIN
XOUT
VSSD1
TEST0
EFMI
LOCK
SMEF
SMON
SMDP
SMDS
WDCK
VDDD2
TESTV
WFCK
LKFS
RESETB
MLT
MDAT
MCK
ISTAT
S0S1
SQCK
SQDT
VDDD3
VSSD2
DIGITAL SIGNAL PROCESSOR
I/O
Description
-
Analog power for DPLL
-
Analog ground for DPLL
O
Pump out for VCO1
O
Pump out for VCO2
-
Digital ground separated bulk bias for DPLL
-
Digital power separated bulk bias for DPLL
O
VCO1/2 clock output (4.3218MHz)
-
Digital power
I
X'tal oscillator input (16.9344MHz)
O
X'tal oscillator output
-
Digital ground
I
Test input
I
EFM signal input
O
CLV servo locking status output
O
LPF time constant control of the spindle servo error signal
O
ON/off control signal for spindle servo
O
Phase control output for spindle motor drive
O
Speed control output for spindle motor drive
O
Word clock output (×1: 88.2kHz, ×2: 176.4kHz)
-
Digital power
I
Various test input
O
Write base clock output
O
The lock status output of frame sync
I
System reset at "L"
I
Latch signal input from micom
I
Serial data input from micom
I
Serial data receiving clock input from micom
O
The internal status output to micom (3-state output)
I/O
Subcode sync signal (S0+S1) output
I
Subcode-Q data transferring bit clock input
O
Subcode-Q data serial output
-
Digital Power
-
Digital Ground
4
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