S5L9291X01-T0R0 View Datasheet(PDF) - Samsung

Part Name

Description

Manufacturer

S5L9291X01-T0R0

DIGITAL SIGNAL PROCESSOR

Samsung 

DIGITAL SIGNAL PROCESSOR

PIN DESCRIPTION (Continued)

Pin No

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

64

65

66

67

Symbol

SBCK

SBDT

MUTE

C4M

TEST1

TEST2

LCHOUT

VDDA_DAC

VHALF

VREF

VSSA_DAC

RCHOUT

VDDD_DAC

VSSD_DAC

TEST3

DATX

JITB

C2PO

RFCK

MNT0

MNT1

MNT2

MNT3

MNT4

MNT5

VSSD3

VDDD4

D15

D14

D13

D12

D11

D10

D9

I/O

Description

I

Subcode data transferring bit clock

I/O

Subcode data serial output

I

System mute at "H"

O

4.2336MHz clock output

I

Test Input

I

Test Input

O

Left-Channel audio output through DAC

-

Analog Power for DAC

O

Reference Voltage output for bypass

O

Reference Voltage output for bypass

-

Analog Ground for DAC

O

Right-Channel audio output through DAC

-

Digital Power for DAC

-

Digital Ground for DAC

I

Test Input

O

Digital audio data output

I/O

Internal SRAM jitter margin status output

O

C2 pointer Output

I/O

Read base clock output

I/O

Monitoring signal output

I/O

Monitoring signal output

I/O

Monitoring signal output

I/O

Monitoring signal output

I/O

Monitoring signal output

I/O

Monitoring signal output

-

Digital Ground

-

Digital Power

I/O

DRAM data Input/Output 15 (3-State Output)

I/O

DRAM data input/output 14 (3-State Output)

I/O

DRAM data input/output 13 (3-State Output)

I/O

DRAM data input/output 12 (3-State Output)

I/O

DRAM data input/output 11 (3-State Output)

I/O

DRAM data input/output 10 (3-State Output)

I/O

DRAM data input/output 9 (3-State Output)

S5L9291X

5

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