S5L9250B
DATA SHEET
• 1-Bit DAC
16-bit ∑ ∆ digital-to-analog converter
On-chip analog postfilter
Filtered line-level outputs, linear phase filtering
90dB SNR
Sampling rate: 44.1kHz
Input rate 1Fs or 2Fs by normal mode/ double mode selection
Digital volume control by MICOM interface
On-chip voltage reference
Digital de-emphasis on/off, digital attenuation
Low clock jitter sensitivity
• Technology & Gate Density
0.35um mixed mode CMOS technology
3.3V power supply (internal core & analog)
5.0V power supply (digital I/O)
Current used: 300mA
Package: 128QFP.
Core used: OAK DSP; ADC for servo use; DAC, 1-bit DAC; 16K SRAM.
Clock used:
1) 33.8688MHz & PLL clock (4.3218MHz * speed coeff.) → DP part.
2) 33.8688MHz or 40MHz synthesized frequency → servo part.
3) 16.9344MHz → 1-bit DAC part.
ORDERING INFORMATION
Device
S5L9250B01-Q0R0
Package
128-QFP-1420C
Operating Temperature
-20°C - +75°C
2