S5L9290X02-E0R0 View Datasheet(PDF) - Samsung
Part Name
Description
Manufacturer
S5L9290X02-E0R0 Datasheet PDF : 47 Pages
| |||
S5L9290X02
DIGITAL SIGNAL PROCESSOR FOR INTERNET AUDIO
PIN DESCRIPTION
NO.
NAME
1
VSSA_PLL
2
VCO1LF
3
VSSD_PLL
4
VDDD_PLL
5
VDDD1-5V
6
XIN
7
XOUT
8
VSSD1
9
EFMI
10
LOCK
11
SMEF
12
SMDP
13
SMDS
14
WDCK
15
TESTV
16
LKFS
17
C4M
18
RESETB
19
MLT
20
MDAT
21
MCK
22
ISTAT
23
S0S1
24
SQCK
I/O
Pin Description
-
Analog Ground for DPLL
O Pump out for VCO1
-
Digital Ground Separated Bulk Bias for DPLL
-
Digital Power Separated Bulk Bias for DPLL (3V Power)
-
Digital Power (5V Power, I/O PAD)
I
X'tal oscillator input (16.9344MHz)
O X'tal oscillator output
-
Digital Ground (I/O PAD)
I
EFM signal input
O CLV Servo locking status output
O LPF time constant control of the spindle servo error signal
O Phase control output for Spindle Motor drive
O Speed control output for Spindle Motor drive
O Word clock output (Normal Speed : 88.2kHz, Double Speed : 176.4kHz)
I
Various Data/Clock Input
O The Lock status output of frame sync
O 4.2336MHz clock output
I
System Reset at 'L'
I
Latch signal input from Micom
I
Serial data input from Micom
I
Serial data receiving clock input from Micom
O The internal status output to Micom
O Subcode sync signal(S0+S1) output
I
Subcode-Q data transfering bit clock input
4
Share Link: 