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XC2365 View Datasheet(PDF) - Infineon Technologies

Part Name
Description
Manufacturer
XC2365 Datasheet PDF : 99 Pages
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XC2365
XC2000 Family Derivatives
Preliminary
Electrical Parameters
4.4
AC Parameters
These parameters describe the dynamic behavior of the XC236x.
4.4.1 Definition of Internal Timing
The internal operation of the XC236x is controlled by the internal system clock fSYS.
Because the system clock signal fSYS can be generated from several internal and
external sources via different mechanisms, the duration of system clock periods (TCSs)
and their variation (and also the derived external timing) depend on the used mechanism
to generate fSYS. This influence must be regarded when calculating the timings for the
XC236x.
Phase Locked Loop Operation (1:N)
fIN
fSYS
Direct Clock Drive (1:1)
fIN
TCS
fSYS
Prescaler Operation (N:1)
fIN
TCS
fSYS
TCS
M C_XC2X_CLOCKGEN
Figure 15 Generation Mechanisms for the System Clock
Note: The example for PLL operation shown in Figure 15 refers to a PLL factor of 1:4,
the example for prescaler operation refers to a divider factor of 2:1.
Data Sheet
80
V0.1, 2007-06
Draft Version

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