SC483 View Datasheet(PDF) - Semtech Corporation

Part Name

Description

Manufacturer

SC483

Dual Synchronous Buck Pseudo Fixed Frequency Power Supply Controller

Semtech Corporation 

SC483

POWER MANAGEMENT

Pin Descriptions (Cont.)

Pin#

15

16

17

18

19

20

21

22

23

24

25

26

27

28

Pin Name Pin Function

PGND2 Power ground.

DL2

Gate drive output for the low side MOSFET switch.

VDDP2 +5V supply voltage input for the gate drivers. Decouple this pin with a 1uF ceramic capacitor to

PGND2.

ILIM2

Current limit input. Connect to drain of low-side MOSFET for RDS(on) sensing or the source for

resistor sensing through a threshold sensing resistor.

LX2

Phase node (junction of top and bottom MOSFETs and the output inductor) connection.

DH2 Gate drive output for the high side MOSFET switch.

BST2 Boost capacitor connection for the high side gate drive.

EN/PSV1

Enable/Power Save input. Pull down to VSSA1 to shut down OUT1 and discharge it through

22Ω (nom.). Pull up to enable OUT1 and activate PSAVE mode. Float to enable OUT1 and

activate continuous conduction mode (CCM). If floated, bypass to VSSA1 with a 10nF ceramic

capacitor.

TON1

This pin is used to sense VBAT through a pullup resistor, RTON1, and to set the top MOSFET on-

time. Bypass this pin with a 1nF ceramic capacitor to VSSA1.

VOUT1 Output voltage sense input for output 1. Connect to the output at the load.

VCCA1 Supply voltage input for the analog supply. Use a 10 Ohm / 1uF RC filter from 5VSUS to VSSA1.

FB1 Feedback input. Connect to a resistor divider located at the IC from VOUT1 to VSSA1 to set the

output voltage from 0.5V to VCCA1.

PGD1

Power Good open drain NMOS output. Goes high after a fixed clock cycle delay (440 cycles)

following power up.

VSSA1 Ground reference for analog circuitry. Connect to PGND1 at the bottom of the output capacitor.

Shoot-Through Delay Timing Diagram

LX

DH

DL

tplhDL

DL

tplhDH

 2005 Semtech Corp.

6

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