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SC905 View Datasheet(PDF) - Semtech Corporation

Part Name
Description
Manufacturer
SC905
Semtech
Semtech Corporation Semtech
SC905 Datasheet PDF : 21 Pages
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SC905
POWER MANAGEMENT
Applications Information
General Description
The SC905 includes 9 low dropout (LDO) voltage regulators
to provide complete power regulation capability for CDMA
handsets or other portable electronic equipment.
Five of the LDOs are designed to be used with analog cir-
cuitry such as audio, radio frequency, or oscillator circuits.
These devices have very low noise levels and high power
supply rejection. The output voltage range for these LDOs
is 2.55V to 2.9V in 50mV steps. The outputs for these
LDOs are VANA, VTCXO, VPLL, VTX, and VRX.
Three other LDOs are general purpose regulators designed
to be used with digital circuits. The noise requirements for
these LDOs are relaxed, but their voltage range is expanded
to cover the wide range of voltages needed for different
types of functions. The outputs for these LDOs are VCORE,
VPAD, and VCAM.
The VMOT output is specically designed to drive a vibrator
motor. This output can supply up to 150mA with voltage set-
tings from 1.35V to 2.9V, allowing designers the exibility to
select the output voltage that provides maximum vibration.
When not used in conjunction with a vibrator, this output
can be used as a general purpose digital regulator.
Power-On Control
The SC905 is activated when the ON pin is pulled high, pro-
vided that the input voltage is within the specied operating
range. The ON pin responds to logic-high edge triggering to
power up the handset. The rising edge ON signal is latched
when the CORE, PAD, ANA, and TCXO LDOs are turned on
and PGOOD goes high. When the PAD LDO output volt-
age reaches 77% of its regulation point, the reset timer
starts and the RESB signal transitions high after delay of
typically 100ms. After a successful power up sequence,
any subsequent condition that toggles RESB (e.g. VPAD
short-circuit, over-temperature, under voltage lockout, I2C
disable of VPAD) will see a delay in the RESB transition
back to high of typically 250ms. The microprocessor then
raises PGOOD high to keep the SC905 powered on. There
is no time limit for the MSM to activate PGOOD. If the MSM
fails to raise PGOOD before the ON switch is released, the
SC905 will transition back into standby mode.
Once the phone is powered on, the SC905 can only be
directly powered off when the PGOOD signal goes low.
Therefore, if the ON pin transitions high when the PGOOD
signal is high, the LDOs and RESB signal will remain in their
state until the microprocessor pulls the PGOOD signal low.
Once the PGOOD signal is low, all the LDOs immediately
power off and all the logic resets to the shutdown condition.
The SC905 can be indirectly powered off by using the I2C
command to turn off the core supply. This will result in a
loss of power to the MSM causing PGOOD to go low, thus
disabling the SC905.
The HFPWR pin operates identically to the ON pin. This
pin provides a second source for activating power so that
remote devices such as battery chargers or system con-
nector pins can be used to enable the device.
LDO Programmable Output Voltage
The output voltage of each LDO regulator is programmable.
Each LDO has a program voltage register that can be ac-
cessed through the I2C interface and the output voltage
adjusted as necessary. (See the Tables on page 14 and
15 for more information.)
ON/OFF Control Register
Each individual LDO may be turned on or off by accessing
the ON/OFF control register. LDOs are turned on by setting
their respective on/off bits to 1 and disabled by setting the
on/off bits to 0. This allows for on/off control with a single
write command.
When an on/off bit is toggled, the registered data is main-
tained. However, all programmed information will be lost
when the PGOOD input goes low.
VCSEL & VPSEL Pin
The VCSEL & VPSEL pins set the default voltage of CORE
and PAD LDOs respectively. When the VCSEL pin is set to
VIN the default voltage for the CORE LDO is 1.80V. When
this pin is set to GND the default voltage for the CORE LDO
is 1.35V. Likewise, when the VPSEL pin is set to VIN the
default voltage for the PAD LDO is 2.60V. When this pin is
set to GND, the default voltage for the PAD LDO is 1.80V.
In both cases the VCSEL and VPSEL pins must be tied to
GND or VIN prior to the device being powered on. This volt-
age cannot change “on the y” by switching the pin voltage
between VIN or GND once the device is on.
© 2006 Semtech Corp.
10
www.semtech.com

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