SEPS225 View Datasheet(PDF) - Unspecified
Part Name
Description
Manufacturer
SEPS225 Datasheet PDF : 44 Pages
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SYNCOAM Co., Ltd.
SEPS225
Version: 0.8
4. Functional Description
MPU Interface
The SEPS225 has three high‐speed system interface : a 68‐system, an 80‐system 8/9/16/18 bit bus, and a clock
synchronous serial(SPI : Serial Peripheral Interface). Among the interface modes, a specific mode is selected
by the setting of PS pin and MEMORY_WRITE_MODE register(16h).
The SEPS225 has 3‐type registers : an index register(IR) 8‐bits, a write data register(WDR), and a read data
register(RDR). The IR stores index information for the control registers and the DDRAM. The WDR
temporarily stores data to be written into control registers and the DDRAM, and the RDR temporarily stores
data read from the DDRAM.
Data written into the DDRAM from the MPU is first written into the WDR and then it is automatically
written into the DDRAM by internal operation. Data is read through the RDR when reading from the
DDRAM, and the first read data is invalid and the second and the following data are valid.
Execution time for instruction excluding oscillation start is 0 clock cycle and instructions can be written in
succession.
80 mode
68 mode
RS
RDB WRB RWB E
00
1
1
1
0
1
0
0
1
1
0
1
1
1
1
1
0
0
1
Operation
Reads internal status
Writes indexes into IR
Reads from DDRAM through RDR
Writes into control registers and DDRAM through WDR
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