SG6105A View Datasheet(PDF) - Fairchild Semiconductor
Part Name
Description
Manufacturer
SG6105A Datasheet PDF : 17 Pages
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Pin Definitions
Pin #
1
2
3
4
5
6
7
9/8
10
11
12
13
14
15
16
17
18
19
20
Name
PSON
V33
V5
OPP
UVAC
NVP
V12
OP1/OP2
PG
FB2
VREF2
VREF1
FB1
GND
COMP
IN
SS
RI
VCC
Description
Remote on/off logic input for CPU or controller. Turn on/off the PWM output after the 7.5ms /
26ms delay.
PSON=0, the main SMPS is operational.
PSON =1, the main SMPS is off and the latch is reset.
3.3V over-voltage/under-voltage control sense input.
5V over-voltage/under-voltage control sense input.
Over-power sense input. This pin is connected to driver transformer or the output of current
transformer. When not in use, this pin should be grounded.
AC fail detection. Detect main AC voltage under-voltage and/or failure.
The protection input for negative output, such as –12V and/or –5V. Trip voltage=2.1V.
12V over-voltage/under-voltage control sense input.
The totem-pole output drivers of push-pull PWM. The outputs are enabled (LOW) only when
the NAND gate inputs are HIGH. The maximum duty cycle on an output (OP1 or OP2) is 46%.
Power-good logic output, 0 or 1 (open-collector). PG=1, the power is good for operation. The
PG delay is 300ms.
Output for second converter regulation loop.
Reference comparison input for second converter regulation loop, 2.5V.
Reference comparison input for first converter regulation loop, 2.5V.
Output for first converter regulation loop.
Ground.
Error amplifier output and the input of the PWM comparator.
The negative input of error amplifier. The positive input of error amplifier is a 2.5V reference
voltage.
Soft-start, settable through an external capacitor. The current source output at this pin is 8µA
and the voltage is clamped at 2.5V.
Connected to external resistor for the reference setting. RI=75kΩ.
Supply voltage. 4.5V ~ 5.5V connected to 5V-standby.
© 2008 Fairchild Semiconductor Corporation
SG6105A • Rev. 1.0.2
5
www.fairchildsemi.com
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