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SIM3C134 View Datasheet(PDF) - Silicon Laboratories

Part Name
Description
Manufacturer
SIM3C134 Datasheet PDF : 90 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
SiM3C1xx
4.6.5. I2C (I2C0, I2C1)................................................................................................... 43
4.6.6. I2S (I2S0)............................................................................................................. 44
4.7. Analog .......................................................................................................................... 45
4.7.1. 12-Bit Analog-to-Digital Converters (SARADC0, SARADC1).............................. 45
4.7.2. Sample Sync Generator (SSG0) ......................................................................... 45
4.7.3. 10-Bit Digital-to-Analog Converter (IDAC0, IDAC1) ............................................ 45
4.7.4. 16-Channel Capacitance-to-Digital Converter (CAPSENSE0) ............................ 46
4.7.5. Low Current Comparators (CMP0, CMP1) .......................................................... 46
4.7.6. Current-to-Voltage Converter (IVC0) ................................................................... 46
4.8. Reset Sources..............................................................................................................47
4.9. Security ........................................................................................................................ 48
4.10.On-Chip Debugging ..................................................................................................... 48
5. Ordering Information .........................................................................................................49
6. Pin Definitions and Packaging Information.....................................................................51
6.1. SiM3C1x7 Pin Definitions............................................................................................. 51
6.2. SiM3C1x6 Pin Definitions............................................................................................. 59
6.3. SiM3C1x4 Pin Definitions............................................................................................. 66
6.4. LGA-92 Package Specifications...................................................................................70
6.4.1. LGA-92 Solder Mask Design ............................................................................... 72
6.4.2. LGA-92 Stencil Design ........................................................................................ 72
6.4.3. LGA-92 Card Assembly ....................................................................................... 72
6.5. TQFP-80 Package Specifications ................................................................................ 73
6.5.1. TQFP-80 Solder Mask Design............................................................................. 76
6.5.2. TQFP-80 Stencil Design ...................................................................................... 76
6.5.3. TQFP-80 Card Assembly..................................................................................... 76
6.6. QFN-64 Package Specifications .................................................................................. 77
6.6.1. QFN-64 Solder Mask Design............................................................................... 79
6.6.2. QFN-64 Stencil Design ........................................................................................ 79
6.6.3. QFN-64 Card Assembly....................................................................................... 79
6.7. TQFP-64 Package Specifications ................................................................................ 80
6.7.1. TQFP-64 Solder Mask Design............................................................................. 83
6.7.2. TQFP-64 Stencil Design ...................................................................................... 83
6.7.3. TQFP-64 Card Assembly..................................................................................... 83
6.8. QFN-40 Package Specifications .................................................................................. 84
6.8.1. QFN-40 Solder Mask Design............................................................................... 86
6.8.2. QFN-40 Stencil Design ........................................................................................ 86
6.8.3. QFN-40 Card Assembly....................................................................................... 86
7. Revision Specific Behavior............................................................................................... 87
7.1. Revision Identification .................................................................................................. 87
7.2. Comparator Rising/Falling Edge Flags in Debug Mode (CMP0, CMP1)...................... 88
7.2.1. Problem ...............................................................................................................88
7.2.2. Impacts ................................................................................................................ 88
7.2.3. Workaround ......................................................................................................... 88
7.2.4. Resolution............................................................................................................ 88
Document Change List ........................................................................................................... 89
Contact Information ................................................................................................................ 90
Rev.1.0
3

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