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SIM3C134 View Datasheet(PDF) - Silicon Laboratories

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Description
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SIM3C134 Datasheet PDF : 90 Pages
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SiM3C1xx
Table 3.2. Power Consumption (Continued)
Parameter
Symbol
Test Condition
Min Typ Max Unit
Analog Peripheral Supply Currents
Voltage Regulator (VREG0)
IVREGIN
Normal Mode, TA = 25 °C
BGDIS = 0, SUSEN = 0
— 300 —
µA
Normal Mode, TA = 85 °C
— 650 µA
BGDIS = 0, SUSEN = 0
Suspend Mode, TA = 25 °C
75
µA
BGDIS = 0, SUSEN = 1
Suspend Mode, TA = 85 °C
BGDIS = 0, SUSEN = 1
115
µA
Sleep Mode, TA = 25 °C
BGDIS = 1, SUSEN = X
90
nA
Sleep Mode, TA = 85 °C
BGDIS = 1, SUSEN = X
— 500 nA
Voltage Regulator (VREG0) Sense IVRSENSE
External Regulator (EXTVREG0) IEXTVREG
SENSEEN = 1
Regulator
Current Sensor
3
µA
— 215 250 µA
7
µA
PLL0 Oscillator (PLL0OSC)
Low-Power Oscillator (LPOSC0)
IPLLOSC
ILPOSC
Operating at 80 MHz
Operating at 20 MHz
Operating at 2.5 MHz
— 1.75 1.86 mA
— 190 —
µA
40
µA
Low-Frequency Oscillator
(LFOSC0)
ILFOSC
Operating at 16.4 kHz,
TA = 25 °C
— 215 —
nA
Operating at 16.4 kHz,
TA = 85 °C
— 500 nA
Notes:
1. Perhipheral currents drop to zero when peripheral clock and peripheral are disabled, unless otherwise noted.
2. Currents are additive. For example, where IDD is specified and the mode is not mutually exclusive, enabling the
functions increases supply current by the specified amount.
3. Includes all peripherals that cannot have clocks gated in the Clock Control module.
4. Includes supply current from internal regulator and PLL0OSC (>20 MHz) or LPOSC0 (<=20 MHz).
5. Flash execution numbers use 2 wait states for 80 MHz and 0 wait states at 20 MHz or less.
6. RAM execution numbers use 0 wait states for all frequencies.
7. IDAC output current and IVC input current not included.
8. Bias current only. Does not include dynamic current from oscillator running at speed.
Rev.1.0
9

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