SM8222A/B
Output timing circuit: mode 0
s SM8222A
VDD = 3.0 ± 0.3 V, GND = 0 V, fCLK = 3.579545 MHz, Ta = −20 to 85 °C
Parameter
Rise time
Fall time
LOW-level pulsewidth
HIGH-level pulsewidth
DCLK frequency
Input/output delay
DOUT to DCLK delay
DCLK to DOUT delay
DCLK to DR delay
Data rate
Symbol
tr0
tf0
tPWL
tPWH
fDCLK0
tIDD
tDCD
tCDD
tCRD
Condition
DR, DCLK, DOUT
DR, DCLK, DOUT
DR, DCLK
DCLK
DCLK
Input → DOUT
DOUT → DCLK
DCLK → DOUT
DCLK → DR
DOUT
Rating
Unit
min
typ
max
–
–
TBD
ns
–
–
TBD
ns
415
416
417
µs
415
416
417
µs
1201.6
1202.8
1204
Hz
–
–
TBD
ms
TBD
416
–
µs
TBD
416
–
µs
415
416
417
µs
1188
1200
1212
baud
s SM8222B
VDD = 5.0 ± 0.5 V, GND = 0 V, fCLK = 3.579545 MHz, Ta = −20 to 85 °C
Parameter
Rise time
Fall time
LOW-level pulsewidth
HIGH-level pulsewidth
DCLK frequency
Input/output delay
DOUT to DCLK delay
DCLK to DOUT delay
DCLK to DR delay
Data rate
Symbol
tr0
tf0
tPWL
tPWH
fDCLK0
tIDD
tDCD
tCDD
tCRD
Condition
DR, DCLK, DOUT
DR, DCLK, DOUT
DR, DCLK
DCLK
DCLK
Input → DOUT
DOUT → DCLK
DCLK → DOUT
DCLK → DR
DOUT
Rating
Unit
min
typ
max
–
–
TBD
ns
–
–
TBD
ns
415
416
417
µs
415
416
417
µs
1201.6
1202.8
1204
Hz
–
–
TBD
ms
TBD
416
–
µs
TBD
416
–
µs
415
416
417
µs
1188
1200
1212
baud
NIPPON PRECISION CIRCUITS—9