SMC032BFY6E View Datasheet(PDF) - Numonyx -> Micron
Part Name
Description
Manufacturer
SMC032BFY6E
Numonyx -> Micron
SMC032BFY6E Datasheet PDF : 91 Pages
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Command Interface
5
Command Interface
SMCxxxBF
There are two types of bus cycles and timing sequences that occur in the PCMCIA type
interface, direct mapped I/O transfer and memory access. Two types of bus cycles are also
available in True IDE interface type: PIO transfer and Multi-Word DMA transfer.
Table 16, Table 17, Table 18, Table 19, Table 20, Table 21 and Table 22 show the read and
write timing parameters. Figure 2, Figure 3, Figure 4, Figure 5, Figure 6, Figure and
Figure 8 show the read and write timing diagrams.
In order to set the card mode, the -OE (-ATASEL) signal must be set and kept stable before
applying VCC until the reset phase is completed. To place the card in Memory mode or I/O
mode, -OE(-ATASEL) must be driven High, while it must be driven Low to place the card in
True IDE mode.
5.1
Attribute Memory Read and Write
Figure 2. Attribute Memory Read waveforms
Address Inputs
–REG
–CE2/–CE1
ta(A)
tsu(A)
ta(CE)
ta(OE)
ten(CE)
tc(R)
VALID
tv(A)
tdis(CE)
–OE
D0 to D15 (DOUT)
ten(OE)
VALID
tdis(OE)
AI10080
1. DOUT signifies data provided by the CompactFlash Memory Card to the system. The -CE signal or both the -OE signal and
the -WE signal must be de-asserted between consecutive cycle operations.
Table 16. Attribute Memory Read timing
Speed Version
300ns
Symbol
tc(R)
ta(A)
ta(CE)
IEEE Symbol
tAVAV
tAVQV
tELQV
Parameter
Read Cycle Time
Address Access Time
CE Access Time
Min
Max
Unit
300
ns
300
ns
300
ns
24/91
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