SMC032BF View Datasheet(PDF) - Numonyx -> Micron
Part Name
Description
Manufacturer
SMC032BF Datasheet PDF : 91 Pages
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Command Interface
SMCxxxBF
Table 21.
I/O Write timing(1) (continued)
Cycle Time Mode
Symbol
IEEE
Symbol
Parameter
thCE(IOWR) tIWHEH CE Hold following IOWR
tsuREG(IOWR) tRGLIWL REG Setup before IOWR
thREG(IOWR) tIWHRGH REG Hold following IOWR
tdfIOIS16(A)
tAVISL
IOIS16 Delay Falling from
Address
tdrIOIS16(A)
tAVISH
IOIS16 Delay Rising from
Address
1. Numonyx CF does not assert the WAIT signal.
2. -IOIS16 is not supported in this mode.
250ns
120ns
100ns
80ns
Unit
Min Max Min Max Min Max Min Max
20
20
10
10
ns
5
5
5
5
ns
0
0
0
0
ns
35
NA
(2)
NA
(2)
NA
(2)
NA
NA
NA
35
(2)
(2)
(2)
5.4
True IDE mode
The timing waveforms for True IDE mode and True IDE DMA mode of operation in this
section are drawn using the conventions in the ATA-4 specification, which are different than
the conventions used in the PCMCIA specification and earlier versions of this specification.
Signals are shown with their asserted state as High regardless of whether the signal is
actually negative or positive true. Consequently, the -IORD, the -IOWR and the -IOCS16
signals are shown in the waveforms inverted from their electrical states on the bus.
Figure 8. True IDE PIO mode Read/Write waveforms
A0-A2, -CS0, -CS1(1)
-IORD/-IOWR
Write Data D0-D15(2)
Read Data D0-D15(2)
-IOCS16(3)
t1
t7
t0
ADDRESS VALID
t2
t9
t8
t2i
VALID
t3
t4
VALID
t5
t6
t6z
1. The device addresses consists of −CS0, −CS1, and A2-A0.
2. The Data I/O consist of D15-D0 (16-bit) or D7-D0 (8 bit).
3. −IOCS16 is shown for PIO modes 0, 1 and 2. For other modes, this signal is ignored.
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