SP506 View Datasheet(PDF) - Signal Processing Technologies
Part Name
Description
Manufacturer
SP506 Datasheet PDF : 30 Pages
| |||
SP506 and SP507 Evaluation Boards
For easy bench testing of the SP506 and SP507,
evaluation boards are available. Similar to the
SP505EB, the SP506EB and SP507EB offers a
"breakout" type configuration that allows the user to
access the driver's and receiver's I/Os. The evaluation
boards have a DB-25 serial connector that is
configured to a EIA-530 DTE pinout. This connector
can be used to analyze any of the serial standards
offered in the SP506 and SP507. Translation cables
may be needed from the DB-25 to the appropriate
connector. Refer to Figure 1 or the cabling schemes
in the Design Guide for Multi-Protocol Serial Ports.
Refer to the SP504/SP505 Evaluation Board Manual
for the SP506EB.
For the SP507EB, the probe pins or access points are
arranged such that the drivers are on one side and the
receivers are on the other. Each driver has three basic
access points: the TTL input, inverting analog
output, and non-inverting analog output. Additional
access points are included for the driver outputs, thus
a total of four access points for each driver. Similarly
with the receiver with two analog inputs, inverting
and non-inverting, and the TTL output. Receiver
inputs have additional access points for convenience.
There are additional ground points for convenient
resistor or capacitor load connections to the driver
output access points. There are also receiver ground
points for convenience at each receiver.
The TTL control lines have DIP switches that allow
the user to input a signal to enter a logic HIGH or
logic LOW. The control lines include the driver and
receiver enable lines and the mode select pins.
For the SP506EB, the driver enable inputs are
active LOW and have internal pull down resistors.
The DIP switch position will either tie the inputs to a
logic HIGH or leave the input open where the internal
pull-down defines a LOW state.
For the SP507EB, the SP507 uses a logic HIGH for
its driver enable lines except for the LL driver, which
Mode Selection
M2 M1
00
00
01
01
10
10
11
11
M0
Mode
Enable
0
1
0
1
0
1
0
1
Physical Layer
V.11 (RS-422)
EIA-530A
EIA-530
X.21
V.35
RS-449 (V.36)
RS-232
SHUTDOWN
OFF
VCC
VCC
TxD
DTR
RTS
TxC
DCE_ST
RL
LL
RxD
RxC
CTS
DSR
DCD
TM
DTE_ST
ON
OFF
VCC
ON
Figure 36. SP507EB Schematic
D1
C3 C1 C2
10µF
C4 25 33 41 48 55 62 73 74 27 26 30 28 31 32
VCC
VCC
VDD
C1+
C1-
C2+
C2- VSS
61
59
14
58
56
13
54
52
16
63
65
15
42
44
22
47
45
17
51
49
24
70
71
1
37
38
20
66
67
80
68
78
69
35
19
36
39
21
40
76
77
79
ST(a)
ST(b)
RL(b)
LL(b)
TM(b)
2
RTEN
3
RREN
4
TMEN
7
SCTEN
5 LLEN
18 RLEN
6
TTEN
23 STEN
SP507CF
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
29
34
43
46
50
53
57
60
64
72
75
GND located next to each
driver output & receiver input
DB-25 Connector Pins & Signals [DTE]
2
SD(a)
14
SD(a)
20
TR(a)
23
TR(b)
4
RS(a)
19
RS(b)
24
TT(a)
11
TT(b)
21
RL(a)
18
LL(a)
3
RD(a)
16
RD(a)
17
RT(a)
9
RT(b)
5
CS(a)
13
CS(b)
6
DM(a)
22
DM(b)
8
RR(a)
10
RR(b)
25
TM(a)
15
SCT(a)
12
SCT(b)
7
SIGNAL GND
1 SHIELD GND
FUSE, jumper or
50ohm 1/4W resistor
TERM_OFF LATCH
M2 M1 M0
10 11 12
D1 = MBRS140T3 Schottky Rectifier
C1 ~ C4 = 22µF Kemet T491C226K016AS
Decoupling Capacitor = 10µF Kemet T351C106K10AS301
TERM_OFF LATCH M2 M1 M0
Reference Design Schematic
Orig.: Zeferino Cervantes
Customer :
Sipex Corporation
Chkd.: John Ng
Title :
SP507 Evaluation Board
233 South Hillview Dr. • Milpitas, CA. 95035 Appr.: Kim Y. Lee
Date : Original : June 9, 1999
Doc. # : TEST308
Rev.
A
SP505/6/7APN/03
SP505, SP506, SP507 Application Note
21
© Copyright 2000 Sipex Corporation
Share Link: 