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SPCA751A-P101 View Datasheet(PDF) - Unspecified

Part Name
Description
Manufacturer
SPCA751A-P101 Datasheet PDF : 13 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Preliminary
SPCA751A-P101
Features
• Single chip MPEG audio decoder
- Conforming to MPEG1/MPEG2 audio layer 2/3
- Extension to MPEG lower sampling rates
• Digital sound control
- Digital volume control
- Stereo/Mono channel select
- Digital sound equalizer
• Internal auto-generate audio clock
- Sampling frequency from 8 kHz up to 48 kHz
• Programmable audio DAC interface
- Support both normal and I2S audio DAC formats
- Audio clock polarity programmable
- Internal auto-generated oversampling clock for DAC
 Accept external audio clock for sampling rate control
• Serial data IO and control interface
- Easy for the host processor to command
• Low power dissipation
• PLL embedded
- Require only 16.934MHz crystal, resistors, and
capacitors to supply the system clock
• Built-in Digital Recording option
- Embedded 10-bit 8 kHz audio ADC
- SACM_S480 recording with 4.8 kbit/sec
- SACM_S3200 recording with 32 kbit/sec
• Device Parameter
- Supply voltage : 3.0 ~ 3.6 volts
- IO interface : 5 volts tolerance, TTL compatible
- Package : 44-pin LQFP
- Power consumption: less than 150 mW @ 3.6 volts
AIP
AIN
ATO
VM
OSCOUT
OSCIN
SPCA751A BLOCK DIAGRAM
ADC
PLL
Clock
Synthesizer
MPEG Audio Decoder
Voice Encoder/Decoder
Host Interface
PCM
Buffer
TFS RFS SCLK DR DT FCEB1 FCEB2
AUD_LRCK
AUD_BCK
AUD_DATA
AUD_XCK
2

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