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SPCA701A View Datasheet(PDF) - Unspecified

Part Name
Description
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SPCA701A Datasheet PDF : 16 Pages
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Preliminary
SPCA701A
VERTICAL BLANKING INTERVALS
For NTSC, scan lines 1-9 and 263-272, inclusive, are always blanked. There is no setup on scan lines 10-21
and 273-284 inclusive. All displayed lines in the vertical blanking interval (10-21 and 273-284 for interlaced
NTSC; 7-13 and 320-335 for interlaced PAL-B, D, G, H, I) are forced to blank. For PAL-B, D, G, H, I, scan lines
1-6, 311-318, and 624-625, inclusive, during fields 1, 2, 5, and 6, are always blanked. During fields 3, 4, 7, and
8, scan lines 1-5, 311-319, and 624-625, inclusive, are always blanked.
DIGITAL PROCESSING
Once the input data is converted into internal YUV format, the UV components are low-pass filtered with a filter.
The Y and filtered UV components are up-sampled to CLK frequency by a digital filter.
SUBCARRIER GENERATION
To maintain a synchronous sub-carrier relative to HSYNC*, the sub-carrier phase is reset every frame for NTSC
and every 8 fields for PAL. The SCA phase is non-zero and depends upon the clock frequency and the video
format.
For a perfect clock input, the burst frequency is 4.43361875 MHz for PAL-B, D,
G, H, I, 3.579545 MHz for NTSC interlaced.
POWER-DOWN MODE
In power-down mode (SLEEP pin set to 1), the internal clock is stopped and also an internal reset is forced and
the DACs are powered down. When returned high, the device starts from a reset state (horizontal and vertical
counters = 0, which is the start of VSYNC in Field 1). This mode should be set when the SPCA701A may be
subjected to clock frequencies outside its functional range. If Master = 1, the HSYNC* and VSYNC* pins remain
driven to the value previously output before SLEEP was activated and power down current is dependent on
loading on the HSYNC* and VSYNC* pins.
Sunplus Technology Co., Ltd.
7
Rev.: 0.2 1999.12.07

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